llvm-32: 3.9.1 -> 4.0.0
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65869a877c
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@ -14,7 +14,9 @@ drwxr-xr-x root/root usr/lib32/cmake/llvm/
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-rw-r--r-- root/root usr/lib32/cmake/llvm/AddLLVMDefinitions.cmake
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-rw-r--r-- root/root usr/lib32/cmake/llvm/AddOCaml.cmake
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-rw-r--r-- root/root usr/lib32/cmake/llvm/AddSphinxTarget.cmake
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-rw-r--r-- root/root usr/lib32/cmake/llvm/CheckAtomic.cmake
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-rw-r--r-- root/root usr/lib32/cmake/llvm/CheckCompilerVersion.cmake
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-rw-r--r-- root/root usr/lib32/cmake/llvm/CheckLinkerFlag.cmake
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-rw-r--r-- root/root usr/lib32/cmake/llvm/ChooseMSVCCRT.cmake
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-rw-r--r-- root/root usr/lib32/cmake/llvm/CrossCompile.cmake
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-rw-r--r-- root/root usr/lib32/cmake/llvm/DetermineGCCCompatible.cmake
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@ -34,9 +36,9 @@ drwxr-xr-x root/root usr/lib32/cmake/llvm/
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-rw-r--r-- root/root usr/lib32/cmake/llvm/LLVMProcessSources.cmake
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-rw-r--r-- root/root usr/lib32/cmake/llvm/TableGen.cmake
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-rw-r--r-- root/root usr/lib32/cmake/llvm/VersionFromVCS.cmake
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lrwxrwxrwx root/root usr/lib32/libLLVM-3.9.1.so -> libLLVM-3.9.so
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-rwxr-xr-x root/root usr/lib32/libLLVM-3.9.so
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lrwxrwxrwx root/root usr/lib32/libLLVM.so -> libLLVM-3.9.so
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lrwxrwxrwx root/root usr/lib32/libLLVM-4.0.0.so -> libLLVM-4.0.so
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-rwxr-xr-x root/root usr/lib32/libLLVM-4.0.so
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lrwxrwxrwx root/root usr/lib32/libLLVM.so -> libLLVM-4.0.so
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-rw-r--r-- root/root usr/lib32/libLLVMAMDGPUAsmParser.a
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-rw-r--r-- root/root usr/lib32/libLLVMAMDGPUAsmPrinter.a
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-rw-r--r-- root/root usr/lib32/libLLVMAMDGPUCodeGen.a
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@ -50,15 +52,19 @@ lrwxrwxrwx root/root usr/lib32/libLLVM.so -> libLLVM-3.9.so
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-rw-r--r-- root/root usr/lib32/libLLVMBPFAsmPrinter.a
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-rw-r--r-- root/root usr/lib32/libLLVMBPFCodeGen.a
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-rw-r--r-- root/root usr/lib32/libLLVMBPFDesc.a
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-rw-r--r-- root/root usr/lib32/libLLVMBPFDisassembler.a
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-rw-r--r-- root/root usr/lib32/libLLVMBPFInfo.a
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-rw-r--r-- root/root usr/lib32/libLLVMBitReader.a
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-rw-r--r-- root/root usr/lib32/libLLVMBitWriter.a
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-rw-r--r-- root/root usr/lib32/libLLVMCodeGen.a
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-rw-r--r-- root/root usr/lib32/libLLVMCore.a
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-rw-r--r-- root/root usr/lib32/libLLVMCoroutines.a
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-rw-r--r-- root/root usr/lib32/libLLVMCoverage.a
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-rw-r--r-- root/root usr/lib32/libLLVMDebugInfoCodeView.a
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-rw-r--r-- root/root usr/lib32/libLLVMDebugInfoDWARF.a
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-rw-r--r-- root/root usr/lib32/libLLVMDebugInfoMSF.a
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-rw-r--r-- root/root usr/lib32/libLLVMDebugInfoPDB.a
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-rw-r--r-- root/root usr/lib32/libLLVMDemangle.a
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-rw-r--r-- root/root usr/lib32/libLLVMExecutionEngine.a
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-rw-r--r-- root/root usr/lib32/libLLVMGlobalISel.a
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-rw-r--r-- root/root usr/lib32/libLLVMIRReader.a
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@ -97,5 +103,8 @@ lrwxrwxrwx root/root usr/lib32/libLLVM.so -> libLLVM-3.9.so
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-rw-r--r-- root/root usr/lib32/libLLVMX86Disassembler.a
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-rw-r--r-- root/root usr/lib32/libLLVMX86Info.a
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-rw-r--r-- root/root usr/lib32/libLLVMX86Utils.a
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-rw-r--r-- root/root usr/lib32/libLLVMXRay.a
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-rw-r--r-- root/root usr/lib32/libLLVMipo.a
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-rwxr-xr-x root/root usr/lib32/libLTO.so
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lrwxrwxrwx root/root usr/lib32/libLTO.so -> libLTO.so.4
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lrwxrwxrwx root/root usr/lib32/libLTO.so.4 -> libLTO.so.4.0.0
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-rwxr-xr-x root/root usr/lib32/libLTO.so.4.0.0
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@ -1,2 +1 @@
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7b8219e2b0d15e96a09dbe8bc2614777 0009-Revert-AMDGPU-Fix-an-interaction-between-WQM-and-pol.patch
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3259018a7437e157f3642df80f1983ea llvm-3.9.1.src.tar.xz
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ea9139a604be702454f6acf160b4f3a2 llvm-4.0.0.src.tar.xz
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@ -1,6 +1,5 @@
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untrusted comment: verify with /etc/ports/compat-32.pub
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RWSwxGo/zH7eXepOzlEla4ovYdza7SzaHHMMMCiuHwtrc6xblyIdDrkKjsDogAUqhya5IKVH0jBWkA9Sc3voPTggtsl+l676cQU=
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SHA256 (Pkgfile) = 5b3c482d992d9f66ceae6e40b414fe1cf3d6b7fad23cada4420a14d2a1d122cf
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SHA256 (.footprint) = 617bfee732c4d597c192d9520d58d2c59196c3a35f25000ec7204786ae5b30b2
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SHA256 (llvm-3.9.1.src.tar.xz) = 1fd90354b9cf19232e8f168faf2220e79be555df3aa743242700879e8fd329ee
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SHA256 (0009-Revert-AMDGPU-Fix-an-interaction-between-WQM-and-pol.patch) = 782e014661ae77b48468103d6879acd415c1fb8e90ccdc26fe1007265fd22c42
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RWSwxGo/zH7eXeMWnHa1+GhZmm8p/XjXxDUT3NvF0i8gTakOsqoM0FGkzr8xpnEPu9rcsxf6joyU4XV4BtNQiHEZ0P1xMJP5Eww=
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SHA256 (Pkgfile) = 50c7c7711e30167233df0c5fe6735dc9086bfb2b86240f403a267007429cd3ff
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SHA256 (.footprint) = ce8ddfd8741e4498a3d779abebf4653a7e4a0a501cef4ca2387d95c61a10a98b
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SHA256 (llvm-4.0.0.src.tar.xz) = 8d10511df96e73b8ff9e7abbfb4d4d432edbdbe965f1f4f07afaf370b8a533be
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@ -1,120 +0,0 @@
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From d6b5bd6f44e8091a4c4870f1c52921c25a4f8cca Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Micha=C5=82=20G=C3=B3rny?= <mgorny@gentoo.org>
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Date: Sat, 21 Jan 2017 12:35:36 +0100
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Subject: [PATCH] Revert "AMDGPU: Fix an interaction between WQM and polygon
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stippling"
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https://bugs.gentoo.org/603858
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---
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lib/Target/AMDGPU/SIInstructions.td | 1 -
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lib/Target/AMDGPU/SIWholeQuadMode.cpp | 7 +++++
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test/CodeGen/AMDGPU/wqm.ll | 49 +++--------------------------------
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3 files changed, 11 insertions(+), 46 deletions(-)
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diff --git a/lib/Target/AMDGPU/SIInstructions.td b/lib/Target/AMDGPU/SIInstructions.td
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index dde5f2fc6b4..18b7d5d62ef 100644
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--- a/lib/Target/AMDGPU/SIInstructions.td
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+++ b/lib/Target/AMDGPU/SIInstructions.td
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@@ -2029,7 +2029,6 @@ def SI_RETURN : PseudoInstSI <
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let hasSideEffects = 1;
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let SALU = 1;
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let hasNoSchedulingInfo = 1;
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- let DisableWQM = 1;
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}
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let Uses = [EXEC], Defs = [EXEC, VCC, M0],
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diff --git a/lib/Target/AMDGPU/SIWholeQuadMode.cpp b/lib/Target/AMDGPU/SIWholeQuadMode.cpp
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index 1534d582569..b200c153df0 100644
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--- a/lib/Target/AMDGPU/SIWholeQuadMode.cpp
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+++ b/lib/Target/AMDGPU/SIWholeQuadMode.cpp
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@@ -219,6 +219,13 @@ char SIWholeQuadMode::scanInstructions(MachineFunction &MF,
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markInstruction(MI, Flags, Worklist);
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GlobalFlags |= Flags;
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}
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+
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+ if (WQMOutputs && MBB.succ_empty()) {
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+ // This is a prolog shader. Make sure we go back to exact mode at the end.
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+ Blocks[&MBB].OutNeeds = StateExact;
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+ Worklist.push_back(&MBB);
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+ GlobalFlags |= StateExact;
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+ }
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}
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return GlobalFlags;
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diff --git a/test/CodeGen/AMDGPU/wqm.ll b/test/CodeGen/AMDGPU/wqm.ll
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index 41e42645788..809a7ba9b82 100644
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--- a/test/CodeGen/AMDGPU/wqm.ll
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+++ b/test/CodeGen/AMDGPU/wqm.ll
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@@ -17,18 +17,17 @@ main_body:
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;CHECK-LABEL: {{^}}test2:
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;CHECK-NEXT: ; %main_body
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;CHECK-NEXT: s_wqm_b64 exec, exec
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+;CHECK: image_sample
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;CHECK-NOT: exec
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-define amdgpu_ps void @test2(<8 x i32> inreg %rsrc, <4 x i32> inreg %sampler, float addrspace(1)* inreg %ptr, <4 x i32> %c) {
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+;CHECK: _load_dword v0,
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+define amdgpu_ps float @test2(<8 x i32> inreg %rsrc, <4 x i32> inreg %sampler, float addrspace(1)* inreg %ptr, <4 x i32> %c) {
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main_body:
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%c.1 = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %c, <8 x i32> %rsrc, <4 x i32> %sampler, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
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%c.2 = bitcast <4 x float> %c.1 to <4 x i32>
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%c.3 = extractelement <4 x i32> %c.2, i32 0
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%gep = getelementptr float, float addrspace(1)* %ptr, i32 %c.3
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%data = load float, float addrspace(1)* %gep
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-
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- call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %data, float undef, float undef, float undef)
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-
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- ret void
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+ ret float %data
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}
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; ... but disabled for stores (and, in this simple case, not re-enabled).
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@@ -415,46 +414,6 @@ entry:
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ret void
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}
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-; Must return to exact at the end of a non-void returning shader,
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-; otherwise the EXEC mask exported by the epilog will be wrong. This is true
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-; even if the shader has no kills, because a kill could have happened in a
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-; previous shader fragment.
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-;
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-; CHECK-LABEL: {{^}}test_nonvoid_return:
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-; CHECK: s_mov_b64 [[LIVE:s\[[0-9]+:[0-9]+\]]], exec
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-; CHECK: s_wqm_b64 exec, exec
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-;
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-; CHECK: s_and_b64 exec, exec, [[LIVE]]
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-; CHECK-NOT: exec
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-define amdgpu_ps <4 x float> @test_nonvoid_return() nounwind {
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- %tex = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
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- %tex.i = bitcast <4 x float> %tex to <4 x i32>
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- %dtex = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %tex.i, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
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- ret <4 x float> %dtex
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-}
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-
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-; CHECK-LABEL: {{^}}test_nonvoid_return_unreachable:
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-; CHECK: s_mov_b64 [[LIVE:s\[[0-9]+:[0-9]+\]]], exec
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-; CHECK: s_wqm_b64 exec, exec
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-;
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-; CHECK: s_and_b64 exec, exec, [[LIVE]]
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-; CHECK-NOT: exec
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-define amdgpu_ps <4 x float> @test_nonvoid_return_unreachable(i32 inreg %c) nounwind {
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-entry:
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- %tex = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> undef, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
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- %tex.i = bitcast <4 x float> %tex to <4 x i32>
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- %dtex = call <4 x float> @llvm.SI.image.sample.v4i32(<4 x i32> %tex.i, <8 x i32> undef, <4 x i32> undef, i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0)
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-
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- %cc = icmp sgt i32 %c, 0
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- br i1 %cc, label %if, label %else
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-
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-if:
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- store volatile <4 x float> %dtex, <4 x float>* undef
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- unreachable
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-
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-else:
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- ret <4 x float> %dtex
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-}
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declare void @llvm.amdgcn.image.store.v4i32(<4 x float>, <4 x i32>, <8 x i32>, i32, i1, i1, i1, i1) #1
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declare void @llvm.amdgcn.buffer.store.f32(float, <4 x i32>, i32, i32, i1, i1) #1
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--
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2.11.0
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@ -5,16 +5,13 @@
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# Depends on: python-32 llvm
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name=llvm-32
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version=3.9.1
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version=4.0.0
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release=1
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source=(http://llvm.org/releases/$version/llvm-$version.src.tar.xz
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0009-Revert-AMDGPU-Fix-an-interaction-between-WQM-and-pol.patch)
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source=(http://llvm.org/releases/$version/llvm-$version.src.tar.xz)
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build() {
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cd llvm-$version.src
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patch -p1 -i $SRC/0009-Revert-AMDGPU-Fix-an-interaction-between-WQM-and-pol.patch
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install -d build $SRC/keep
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cd build
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