From 341dd5edfd13d6510b9318a58a3aec4e26d84949 Mon Sep 17 00:00:00 2001 From: Tim Biermann Date: Fri, 22 Mar 2024 21:59:38 +0100 Subject: [PATCH] spirv-llvm-translator: -> 18.1.0 --- spirv-llvm-translator/.signature | 5 +- spirv-llvm-translator/2388.patch | 391 ------------------------------- spirv-llvm-translator/Pkgfile | 7 +- 3 files changed, 4 insertions(+), 399 deletions(-) delete mode 100644 spirv-llvm-translator/2388.patch diff --git a/spirv-llvm-translator/.signature b/spirv-llvm-translator/.signature index 36f738b73..a47450a90 100644 --- a/spirv-llvm-translator/.signature +++ b/spirv-llvm-translator/.signature @@ -1,6 +1,5 @@ untrusted comment: verify with /etc/ports/opt.pub -RWSE3ohX2g5d/cIBtq7YOD8wrj+EmaxUNjhEU/u0g/yhVfqFGrBQClqZ5qEc3ggo+s+9lPAFALWXkRWH0MijgHXRaPLNei6btQM= -SHA256 (Pkgfile) = 25dd3c2d72fe384c0783af2d32839293277851f68367adf097390e300c0c955f +RWSE3ohX2g5d/R3Ool/OkyzUiCN2CjKOhHs6uMzdCcdw2LuzLSSSjBZTPsa95SpZ4DtH6Uj98ZhJrmX1VMSwp4n9sWJlGitHzgE= +SHA256 (Pkgfile) = 31329175348c315f78db6f143d35fb5c694e2994a441d4f37de1ddee991d81a5 SHA256 (.footprint) = cd463b26973c4d27d3224f5f0cc026b48489191c2610d91098c10c033d914000 SHA256 (spirv-llvm-translator-18.1.0.tar.gz) = 78a770eff24d5ffe2798479845adec4b909cbf058ddc55830ea00fa7d2c1698a -SHA256 (2388.patch) = 192694755de32ac95461c8c9bfa486b6625507f91435ff6e72d0226c2488a7a5 diff --git a/spirv-llvm-translator/2388.patch b/spirv-llvm-translator/2388.patch deleted file mode 100644 index 331e76e22..000000000 --- a/spirv-llvm-translator/2388.patch +++ /dev/null @@ -1,391 +0,0 @@ -From 506792b25c2d3ec827d8aa49349f6e7b725c56c4 Mon Sep 17 00:00:00 2001 -From: Viktoria Maximova -Date: Mon, 26 Feb 2024 18:37:25 +0100 -Subject: [PATCH] [Backport to 18] Support SPV_INTEL_maximum_registers - extension (#2344) - -Spec: -KhronosGroup/SPIRV-Registry#235 ---- - include/LLVMSPIRVExtensions.inc | 1 + - lib/SPIRV/SPIRVReader.cpp | 42 +++++++++ - lib/SPIRV/SPIRVWriter.cpp | 37 +++++++- - lib/SPIRV/SPIRVWriter.h | 1 + - lib/SPIRV/libSPIRV/SPIRVEntry.cpp | 3 + - lib/SPIRV/libSPIRV/SPIRVEntry.h | 19 ++++- - lib/SPIRV/libSPIRV/SPIRVEnum.h | 6 ++ - lib/SPIRV/libSPIRV/SPIRVIsValidEnum.h | 3 + - lib/SPIRV/libSPIRV/SPIRVNameMapEnum.h | 8 ++ - lib/SPIRV/libSPIRV/SPIRVStream.cpp | 1 + - lib/SPIRV/libSPIRV/SPIRVStream.h | 1 + - spirv-headers-tag.conf | 2 +- - .../registerallocmode_maxreg_extension.ll | 85 +++++++++++++++++++ - 13 files changed, 206 insertions(+), 3 deletions(-) - create mode 100644 test/extensions/INTEL/SPV_INTEL_maximum_registers/registerallocmode_maxreg_extension.ll - -diff --git a/include/LLVMSPIRVExtensions.inc b/include/LLVMSPIRVExtensions.inc -index 780faec576..b884e37230 100644 ---- a/include/LLVMSPIRVExtensions.inc -+++ b/include/LLVMSPIRVExtensions.inc -@@ -69,3 +69,4 @@ EXT(SPV_INTEL_fpga_argument_interfaces) - EXT(SPV_INTEL_fpga_latency_control) - EXT(SPV_INTEL_fp_max_error) - EXT(SPV_INTEL_cache_controls) -+EXT(SPV_INTEL_maximum_registers) -diff --git a/lib/SPIRV/SPIRVReader.cpp b/lib/SPIRV/SPIRVReader.cpp -index 0502d4e613..daf9fb6a21 100644 ---- a/lib/SPIRV/SPIRVReader.cpp -+++ b/lib/SPIRV/SPIRVReader.cpp -@@ -4306,6 +4306,48 @@ bool SPIRVToLLVM::transMetadata() { - F->setMetadata(kSPIR2MD::IntelFPGAIPInterface, - MDNode::get(*Context, InterfaceMDVec)); - } -+ if (auto *EM = BF->getExecutionMode(ExecutionModeMaximumRegistersINTEL)) { -+ NamedMDNode *ExecModeMD = -+ M->getOrInsertNamedMetadata(kSPIRVMD::ExecutionMode); -+ -+ SmallVector ValueVec; -+ ValueVec.push_back(ConstantAsMetadata::get(F)); -+ ValueVec.push_back( -+ ConstantAsMetadata::get(getUInt32(M, EM->getExecutionMode()))); -+ ValueVec.push_back( -+ ConstantAsMetadata::get(getUInt32(M, EM->getLiterals()[0]))); -+ ExecModeMD->addOperand(MDNode::get(*Context, ValueVec)); -+ } -+ if (auto *EM = BF->getExecutionMode(ExecutionModeMaximumRegistersIdINTEL)) { -+ NamedMDNode *ExecModeMD = -+ M->getOrInsertNamedMetadata(kSPIRVMD::ExecutionMode); -+ -+ SmallVector ValueVec; -+ ValueVec.push_back(ConstantAsMetadata::get(F)); -+ ValueVec.push_back( -+ ConstantAsMetadata::get(getUInt32(M, EM->getExecutionMode()))); -+ -+ auto *ExecOp = BF->getModule()->getValue(EM->getLiterals()[0]); -+ ValueVec.push_back( -+ MDNode::get(*Context, ConstantAsMetadata::get(cast( -+ transValue(ExecOp, nullptr, nullptr))))); -+ ExecModeMD->addOperand(MDNode::get(*Context, ValueVec)); -+ } -+ if (auto *EM = -+ BF->getExecutionMode(ExecutionModeNamedMaximumRegistersINTEL)) { -+ NamedMDNode *ExecModeMD = -+ M->getOrInsertNamedMetadata(kSPIRVMD::ExecutionMode); -+ -+ SmallVector ValueVec; -+ ValueVec.push_back(ConstantAsMetadata::get(F)); -+ ValueVec.push_back( -+ ConstantAsMetadata::get(getUInt32(M, EM->getExecutionMode()))); -+ -+ assert(EM->getLiterals()[0] == 0 && -+ "Invalid named maximum number of registers"); -+ ValueVec.push_back(MDString::get(*Context, "AutoINTEL")); -+ ExecModeMD->addOperand(MDNode::get(*Context, ValueVec)); -+ } - } - NamedMDNode *MemoryModelMD = - M->getOrInsertNamedMetadata(kSPIRVMD::MemoryModel); -diff --git a/lib/SPIRV/SPIRVWriter.cpp b/lib/SPIRV/SPIRVWriter.cpp -index ba25f210f6..55a66c1e64 100644 ---- a/lib/SPIRV/SPIRVWriter.cpp -+++ b/lib/SPIRV/SPIRVWriter.cpp -@@ -977,7 +977,10 @@ SPIRVFunction *LLVMToSPIRVBase::transFunctionDecl(Function *F) { - - transFPGAFunctionMetadata(BF, F); - -- transFunctionMetadataAsUserSemanticDecoration(BF, F); -+ if (BM->isAllowedToUseExtension(ExtensionID::SPV_INTEL_maximum_registers)) -+ transFunctionMetadataAsExecutionMode(BF, F); -+ else -+ transFunctionMetadataAsUserSemanticDecoration(BF, F); - - transAuxDataInst(BF, F); - -@@ -1118,6 +1121,38 @@ void LLVMToSPIRVBase::transFPGAFunctionMetadata(SPIRVFunction *BF, - transMetadataDecorations(FDecoMD, BF); - } - -+void LLVMToSPIRVBase::transFunctionMetadataAsExecutionMode(SPIRVFunction *BF, -+ Function *F) { -+ SmallVector RegisterAllocModeMDs; -+ F->getMetadata("RegisterAllocMode", RegisterAllocModeMDs); -+ -+ for (unsigned I = 0; I < RegisterAllocModeMDs.size(); I++) { -+ auto *RegisterAllocMode = RegisterAllocModeMDs[I]->getOperand(0).get(); -+ if (isa(RegisterAllocMode)) { -+ StringRef Str = getMDOperandAsString(RegisterAllocModeMDs[I], 0); -+ NamedMaximumNumberOfRegisters NamedValue = -+ SPIRVNamedMaximumNumberOfRegistersNameMap::rmap(Str.str()); -+ BF->addExecutionMode(BM->add(new SPIRVExecutionMode( -+ OpExecutionMode, BF, ExecutionModeNamedMaximumRegistersINTEL, -+ NamedValue))); -+ } else if (isa(RegisterAllocMode)) { -+ auto *RegisterAllocNodeMDOp = -+ getMDOperandAsMDNode(RegisterAllocModeMDs[I], 0); -+ int Num = getMDOperandAsInt(RegisterAllocNodeMDOp, 0); -+ auto *Const = -+ BM->addConstant(transType(Type::getInt32Ty(F->getContext())), Num); -+ BF->addExecutionMode(BM->add(new SPIRVExecutionModeId( -+ BF, ExecutionModeMaximumRegistersIdINTEL, Const->getId()))); -+ } else { -+ int64_t RegisterAllocVal = -+ mdconst::dyn_extract(RegisterAllocMode)->getZExtValue(); -+ BF->addExecutionMode(BM->add(new SPIRVExecutionMode( -+ OpExecutionMode, BF, ExecutionModeMaximumRegistersINTEL, -+ RegisterAllocVal))); -+ } -+ } -+} -+ - void LLVMToSPIRVBase::transFunctionMetadataAsUserSemanticDecoration( - SPIRVFunction *BF, Function *F) { - if (auto *RegisterAllocModeMD = F->getMetadata("RegisterAllocMode")) { -diff --git a/lib/SPIRV/SPIRVWriter.h b/lib/SPIRV/SPIRVWriter.h -index cafff7f2c8..344a77f8fc 100644 ---- a/lib/SPIRV/SPIRVWriter.h -+++ b/lib/SPIRV/SPIRVWriter.h -@@ -131,6 +131,7 @@ class LLVMToSPIRVBase : protected BuiltinCallHelper { - SPIRVFunction *transFunctionDecl(Function *F); - void transVectorComputeMetadata(Function *F); - void transFPGAFunctionMetadata(SPIRVFunction *BF, Function *F); -+ void transFunctionMetadataAsExecutionMode(SPIRVFunction *BF, Function *F); - void transFunctionMetadataAsUserSemanticDecoration(SPIRVFunction *BF, - Function *F); - void transAuxDataInst(SPIRVFunction *BF, Function *F); -diff --git a/lib/SPIRV/libSPIRV/SPIRVEntry.cpp b/lib/SPIRV/libSPIRV/SPIRVEntry.cpp -index a522d71943..b7ea5ff715 100644 ---- a/lib/SPIRV/libSPIRV/SPIRVEntry.cpp -+++ b/lib/SPIRV/libSPIRV/SPIRVEntry.cpp -@@ -660,6 +660,9 @@ void SPIRVExecutionMode::decode(std::istream &I) { - case ExecutionModeSchedulerTargetFmaxMhzINTEL: - case ExecutionModeRegisterMapInterfaceINTEL: - case ExecutionModeStreamingInterfaceINTEL: -+ case ExecutionModeMaximumRegistersINTEL: -+ case ExecutionModeMaximumRegistersIdINTEL: -+ case ExecutionModeNamedMaximumRegistersINTEL: - WordLiterals.resize(1); - break; - default: -diff --git a/lib/SPIRV/libSPIRV/SPIRVEntry.h b/lib/SPIRV/libSPIRV/SPIRVEntry.h -index 7218e4ac32..7c0afc903b 100644 ---- a/lib/SPIRV/libSPIRV/SPIRVEntry.h -+++ b/lib/SPIRV/libSPIRV/SPIRVEntry.h -@@ -696,6 +696,17 @@ class SPIRVExecutionMode : public SPIRVAnnotation { - } - } - -+ std::optional getRequiredExtension() const override { -+ switch (static_cast(ExecMode)) { -+ case ExecutionModeMaximumRegistersINTEL: -+ case ExecutionModeMaximumRegistersIdINTEL: -+ case ExecutionModeNamedMaximumRegistersINTEL: -+ return ExtensionID::SPV_INTEL_maximum_registers; -+ default: -+ return {}; -+ } -+ } -+ - protected: - _SPIRV_DCL_ENCDEC - SPIRVExecutionModeKind ExecMode; -@@ -757,6 +768,11 @@ class SPIRVComponentExecutionModes { - return IsDenorm(EMK) || IsRoundingMode(EMK) || IsFPMode(EMK) || - IsOtherFP(EMK); - }; -+ auto IsMaxRegisters = [&](auto EMK) { -+ return EMK == ExecutionModeMaximumRegistersINTEL || -+ EMK == ExecutionModeMaximumRegistersIdINTEL || -+ EMK == ExecutionModeNamedMaximumRegistersINTEL; -+ }; - auto IsCompatible = [&](SPIRVExecutionMode *EM0, SPIRVExecutionMode *EM1) { - if (EM0->getTargetId() != EM1->getTargetId()) - return true; -@@ -770,7 +786,8 @@ class SPIRVComponentExecutionModes { - return true; - return !(IsDenorm(EMK0) && IsDenorm(EMK1)) && - !(IsRoundingMode(EMK0) && IsRoundingMode(EMK1)) && -- !(IsFPMode(EMK0) && IsFPMode(EMK1)); -+ !(IsFPMode(EMK0) && IsFPMode(EMK1)) && -+ !(IsMaxRegisters(EMK0) && IsMaxRegisters(EMK1)); - }; - for (auto I = ExecModes.begin(); I != ExecModes.end(); ++I) { - assert(IsCompatible(ExecMode, (*I).second) && -diff --git a/lib/SPIRV/libSPIRV/SPIRVEnum.h b/lib/SPIRV/libSPIRV/SPIRVEnum.h -index d1bbc83626..ccabddb597 100644 ---- a/lib/SPIRV/libSPIRV/SPIRVEnum.h -+++ b/lib/SPIRV/libSPIRV/SPIRVEnum.h -@@ -291,6 +291,12 @@ template <> inline void SPIRVMap::init() { - {CapabilityFPGAKernelAttributesINTEL}); - ADD_VEC_INIT(ExecutionModeNamedBarrierCountINTEL, - {CapabilityVectorComputeINTEL}); -+ ADD_VEC_INIT(ExecutionModeMaximumRegistersINTEL, -+ {CapabilityRegisterLimitsINTEL}); -+ ADD_VEC_INIT(ExecutionModeMaximumRegistersIdINTEL, -+ {CapabilityRegisterLimitsINTEL}); -+ ADD_VEC_INIT(ExecutionModeNamedMaximumRegistersINTEL, -+ {CapabilityRegisterLimitsINTEL}); - } - - template <> inline void SPIRVMap::init() { -diff --git a/lib/SPIRV/libSPIRV/SPIRVIsValidEnum.h b/lib/SPIRV/libSPIRV/SPIRVIsValidEnum.h -index 080b8bcd86..9930349dbd 100644 ---- a/lib/SPIRV/libSPIRV/SPIRVIsValidEnum.h -+++ b/lib/SPIRV/libSPIRV/SPIRVIsValidEnum.h -@@ -73,6 +73,9 @@ inline bool isValid(spv::ExecutionModel V) { - case ExecutionModelCallableKHR: - case ExecutionModeRegisterMapInterfaceINTEL: - case ExecutionModeStreamingInterfaceINTEL: -+ case ExecutionModeMaximumRegistersINTEL: -+ case ExecutionModeMaximumRegistersIdINTEL: -+ case ExecutionModeNamedMaximumRegistersINTEL: - return true; - default: - return false; -diff --git a/lib/SPIRV/libSPIRV/SPIRVNameMapEnum.h b/lib/SPIRV/libSPIRV/SPIRVNameMapEnum.h -index 2635c974be..53fc2e192a 100644 ---- a/lib/SPIRV/libSPIRV/SPIRVNameMapEnum.h -+++ b/lib/SPIRV/libSPIRV/SPIRVNameMapEnum.h -@@ -637,6 +637,7 @@ template <> inline void SPIRVMap::init() { - add(CapabilityFPGAArgumentInterfacesINTEL, "FPGAArgumentInterfacesINTEL"); - add(CapabilityFPGALatencyControlINTEL, "FPGALatencyControlINTEL"); - add(CapabilityFPMaxErrorINTEL, "FPMaxErrorINTEL"); -+ add(CapabilityRegisterLimitsINTEL, "RegisterLimitsINTEL"); - // From spirv_internal.hpp - add(internal::CapabilityFastCompositeINTEL, "FastCompositeINTEL"); - add(internal::CapabilityOptNoneINTEL, "OptNoneINTEL"); -@@ -691,6 +692,13 @@ template <> inline void SPIRVMap::init() { - } - SPIRV_DEF_NAMEMAP(HostAccessQualifier, SPIRVHostAccessQualifierNameMap) - -+template <> -+inline void SPIRVMap::init() { -+ add(NamedMaximumNumberOfRegistersAutoINTEL, "AutoINTEL"); -+} -+SPIRV_DEF_NAMEMAP(NamedMaximumNumberOfRegisters, -+ SPIRVNamedMaximumNumberOfRegistersNameMap); -+ - } /* namespace SPIRV */ - - #endif // SPIRV_LIBSPIRV_SPIRVNAMEMAPENUM_H -diff --git a/lib/SPIRV/libSPIRV/SPIRVStream.cpp b/lib/SPIRV/libSPIRV/SPIRVStream.cpp -index 7b785b5b55..7dfbdddbfa 100644 ---- a/lib/SPIRV/libSPIRV/SPIRVStream.cpp -+++ b/lib/SPIRV/libSPIRV/SPIRVStream.cpp -@@ -147,6 +147,7 @@ SPIRV_DEF_ENCDEC(SPIRVDebugExtOpKind) - SPIRV_DEF_ENCDEC(NonSemanticAuxDataOpKind) - SPIRV_DEF_ENCDEC(InitializationModeQualifier) - SPIRV_DEF_ENCDEC(HostAccessQualifier) -+SPIRV_DEF_ENCDEC(NamedMaximumNumberOfRegisters) - SPIRV_DEF_ENCDEC(LinkageType) - - // Read a string with padded 0's at the end so that they form a stream of -diff --git a/lib/SPIRV/libSPIRV/SPIRVStream.h b/lib/SPIRV/libSPIRV/SPIRVStream.h -index 0a788044a6..21cb51a3a0 100644 ---- a/lib/SPIRV/libSPIRV/SPIRVStream.h -+++ b/lib/SPIRV/libSPIRV/SPIRVStream.h -@@ -231,6 +231,7 @@ SPIRV_DEC_ENCDEC(SPIRVDebugExtOpKind) - SPIRV_DEC_ENCDEC(NonSemanticAuxDataOpKind) - SPIRV_DEC_ENCDEC(InitializationModeQualifier) - SPIRV_DEC_ENCDEC(HostAccessQualifier) -+SPIRV_DEC_ENCDEC(NamedMaximumNumberOfRegisters) - SPIRV_DEC_ENCDEC(LinkageType) - - const SPIRVEncoder &operator<<(const SPIRVEncoder &O, const std::string &Str); -diff --git a/spirv-headers-tag.conf b/spirv-headers-tag.conf -index 7fae55f32b..3c34bf8933 100644 ---- a/spirv-headers-tag.conf -+++ b/spirv-headers-tag.conf -@@ -1 +1 @@ --1c6bb2743599e6eb6f37b2969acc0aef812e32e3 -+b73e168ca5e123dcf3dea8a34b19a5130f421ae1 -diff --git a/test/extensions/INTEL/SPV_INTEL_maximum_registers/registerallocmode_maxreg_extension.ll b/test/extensions/INTEL/SPV_INTEL_maximum_registers/registerallocmode_maxreg_extension.ll -new file mode 100644 -index 0000000000..1dfc768ffe ---- /dev/null -+++ b/test/extensions/INTEL/SPV_INTEL_maximum_registers/registerallocmode_maxreg_extension.ll -@@ -0,0 +1,85 @@ -+; RUN: llvm-as %s -o %t.bc -+; RUN: llvm-spirv -spirv-text --spirv-ext=+SPV_INTEL_maximum_registers %t.bc -+; RUN: FileCheck < %t.spt %s --check-prefix=CHECK-SPIRV -+; RUN: llvm-spirv %t.bc --spirv-ext=+SPV_INTEL_maximum_registers -o %t.spv -+; RUN: llvm-spirv -r %t.spv -spirv-target-env=SPV-IR -o - | llvm-dis -o %t.rev.ll -+; RUN: FileCheck < %t.rev.ll %s --check-prefix=CHECK-LLVM -+ -+; CHECK-SPIRV: EntryPoint [[#]] [[#FUNC0:]] "main_l3" -+; CHECK-SPIRV: EntryPoint [[#]] [[#FUNC1:]] "main_l6" -+; CHECK-SPIRV: EntryPoint [[#]] [[#FUNC2:]] "main_l9" -+; CHECK-SPIRV: EntryPoint [[#]] [[#FUNC3:]] "main_l13" -+; CHECK-SPIRV: EntryPoint [[#]] [[#FUNC4:]] "main_l19" -+ -+; CHECK-SPIRV: ExecutionMode [[#FUNC0]] 6461 2 -+; CHECK-SPIRV: ExecutionMode [[#FUNC1]] 6461 1 -+; CHECK-SPIRV: ExecutionMode [[#FUNC2]] 6463 0 -+; CHECK-SPIRV: ExecutionModeId [[#FUNC3]] 6462 [[#Const3:]] -+; CHECK-SPIRV: TypeInt [[#TypeInt:]] 32 0 -+; CHECK-SPIRV: Constant [[#TypeInt]] [[#Const3]] 3 -+ -+; CHECK-SPIRV-NOT: ExecutionMode [[#FUNC4]] -+ -+; CHECK-LLVM: !spirv.ExecutionMode = !{![[#FLAG0:]], ![[#FLAG1:]], ![[#FLAG2:]], ![[#FLAG3:]]} -+; CHECK-LLVM: ![[#FLAG0]] = !{ptr @main_l3, i32 6461, i32 2} -+; CHECK-LLVM: ![[#FLAG1]] = !{ptr @main_l6, i32 6461, i32 1} -+; CHECK-LLVM: ![[#FLAG2]] = !{ptr @main_l9, i32 6463, !"AutoINTEL"} -+; CHECK-LLVM: ![[#FLAG3]] = !{ptr @main_l13, i32 6462, ![[#VAL:]]} -+; CHECK-LLVM: ![[#VAL]] = !{i32 3} -+ -+target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64" -+target triple = "spir64" -+ -+; Function Attrs: noinline nounwind optnone -+define weak dso_local spir_kernel void @main_l3() #0 !RegisterAllocMode !10 { -+newFuncRoot: -+ ret void -+} -+ -+; Function Attrs: noinline nounwind optnone -+define weak dso_local spir_kernel void @main_l6() #0 !RegisterAllocMode !11 { -+newFuncRoot: -+ ret void -+} -+ -+; Function Attrs: noinline nounwind optnone -+define weak dso_local spir_kernel void @main_l9() #0 !RegisterAllocMode !12 { -+newFuncRoot: -+ ret void -+} -+ -+; Function Attrs: noinline nounwind optnone -+define weak dso_local spir_kernel void @main_l13() #0 !RegisterAllocMode !13 { -+newFuncRoot: -+ ret void -+} -+ -+; Function Attrs: noinline nounwind optnone -+define weak dso_local spir_kernel void @main_l19() #0 { -+newFuncRoot: -+ ret void -+} -+ -+attributes #0 = { noinline nounwind optnone } -+ -+ -+!opencl.compiler.options = !{!0, !0, !0, !0, !0, !0, !0, !0, !0, !0, !0, !0, !0, !0, !0, !0, !0, !0, !0, !0, !0, !0} -+!spirv.Source = !{!2, !3, !3, !3, !3, !3, !2, !3, !2, !2, !2, !2, !2, !2, !2, !2, !2, !2, !2, !2, !2, !2} -+!llvm.module.flags = !{!4, !5, !6, !7, !8} -+!spirv.MemoryModel = !{!9, !9, !9, !9, !9, !9} -+!spirv.ExecutionMode = !{} -+ -+!0 = !{} -+!2 = !{i32 4, i32 200000} -+!3 = !{i32 3, i32 200000} -+!4 = !{i32 1, !"wchar_size", i32 4} -+!5 = !{i32 7, !"openmp", i32 50} -+!6 = !{i32 7, !"openmp-device", i32 50} -+!7 = !{i32 8, !"PIC Level", i32 2} -+!8 = !{i32 7, !"frame-pointer", i32 2} -+!9 = !{i32 2, i32 2} -+!10 = !{i32 2} -+!11 = !{i32 1} -+!12 = !{!"AutoINTEL"} -+!13 = !{!14} -+!14 = !{i32 3} diff --git a/spirv-llvm-translator/Pkgfile b/spirv-llvm-translator/Pkgfile index 6831aab60..627b700ab 100644 --- a/spirv-llvm-translator/Pkgfile +++ b/spirv-llvm-translator/Pkgfile @@ -5,15 +5,12 @@ name=spirv-llvm-translator version=18.1.0 -release=1 -source=(https://github.com/KhronosGroup/SPIRV-LLVM-Translator/archive/v$version/$name-$version.tar.gz - 2388.patch) +release=2 +source=(https://github.com/KhronosGroup/SPIRV-LLVM-Translator/archive/v$version/$name-$version.tar.gz) build() { prt-get isinst ccache && PATH="$(echo ${PATH} | awk -v RS=: -v ORS=: '/ccache/ {next} {print}' | sed 's/:*$//')" - patch -Rp1 -d SPIRV-LLVM-Translator-$version -i $SRC/2388.patch - cmake -S SPIRV-LLVM-Translator-$version -B build -G Ninja $PKGMK_SLT \ -D CMAKE_INSTALL_PREFIX=/usr \ -D CMAKE_INSTALL_LIBDIR=lib \