119 lines
4.3 KiB
Diff
119 lines
4.3 KiB
Diff
2005-10-28 Gwenole Beauchesne <gbeauchesne@mandriva.com>
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* Various additional hacks for GCC4.
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--- qemu-0.7.2/target-i386/ops_sse.h.gcc4-hacks 2005-09-04 19:11:31.000000000 +0200
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+++ qemu-0.7.2/target-i386/ops_sse.h 2005-10-28 10:09:21.000000000 +0200
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@@ -34,6 +34,12 @@
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#define Q(n) XMM_Q(n)
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#define SUFFIX _xmm
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#endif
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+#if defined(__i386__) && __GNUC__ >= 4
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+#define RegCopy(d, s) __builtin_memcpy(&(d), &(s), sizeof(d))
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+#endif
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+#ifndef RegCopy
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+#define RegCopy(d, s) d = s
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+#endif
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void OPPROTO glue(op_psrlw, SUFFIX)(void)
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{
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@@ -570,7 +576,7 @@ void OPPROTO glue(op_pshufw, SUFFIX) (vo
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r.W(1) = s->W((order >> 2) & 3);
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r.W(2) = s->W((order >> 4) & 3);
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r.W(3) = s->W((order >> 6) & 3);
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- *d = r;
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+ RegCopy(*d, r);
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}
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#else
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void OPPROTO op_shufps(void)
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--- qemu-0.7.2/target-i386/helper.c.gcc4-hacks 2005-09-04 19:11:31.000000000 +0200
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+++ qemu-0.7.2/target-i386/helper.c 2005-10-28 10:09:21.000000000 +0200
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@@ -3130,8 +3130,15 @@ void helper_fxrstor(target_ulong ptr, in
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nb_xmm_regs = 8 << data64;
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addr = ptr + 0xa0;
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for(i = 0; i < nb_xmm_regs; i++) {
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+#if defined(__i386__) && __GNUC__ >= 4
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+ env->xmm_regs[i].XMM_L(0) = ldl(addr);
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+ env->xmm_regs[i].XMM_L(1) = ldl(addr + 4);
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+ env->xmm_regs[i].XMM_L(2) = ldl(addr + 8);
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+ env->xmm_regs[i].XMM_L(3) = ldl(addr + 12);
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+#else
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env->xmm_regs[i].XMM_Q(0) = ldq(addr);
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env->xmm_regs[i].XMM_Q(1) = ldq(addr + 8);
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+#endif
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addr += 16;
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}
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}
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--- qemu-0.7.2/cpu-all.h.gcc4-hacks 2005-09-04 19:11:31.000000000 +0200
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+++ qemu-0.7.2/cpu-all.h 2005-10-28 10:09:21.000000000 +0200
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@@ -339,7 +339,13 @@
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static inline void stq_le_p(void *ptr, uint64_t v)
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{
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+#if defined(__i386__) && __GNUC__ >= 4
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+ const union { uint64_t v; uint32_t p[2]; } x = { .v = v };
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+ ((uint32_t *)ptr)[0] = x.p[0];
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+ ((uint32_t *)ptr)[1] = x.p[1];
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+#else
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*(uint64_t *)ptr = v;
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+#endif
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}
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/* float access */
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--- qemu-0.7.2/softmmu_header.h.gcc4-hacks 2005-10-28 10:08:08.000000000 +0200
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+++ qemu-0.7.2/softmmu_header.h 2005-10-28 10:09:21.000000000 +0200
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@@ -104,7 +104,7 @@
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void REGPARM(2) glue(glue(__st, SUFFIX), MMUSUFFIX)(target_ulong addr, DATA_TYPE v, int is_user);
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#if (DATA_SIZE <= 4) && (TARGET_LONG_BITS == 32) && defined(__i386__) && \
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- (ACCESS_TYPE <= 1) && defined(ASM_SOFTMMU)
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+ (ACCESS_TYPE <= 1) && defined(ASM_SOFTMMU) && (__GNUC__ < 4)
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#define CPU_TLB_ENTRY_BITS 4
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@@ -131,7 +131,7 @@ static inline RES_TYPE glue(glue(ld, USU
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"m" (*(uint32_t *)offsetof(CPUState, tlb_read[CPU_MEM_INDEX][0].address)),
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"i" (CPU_MEM_INDEX),
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"m" (*(uint8_t *)&glue(glue(__ld, SUFFIX), MMUSUFFIX))
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- : "%eax", "%ecx", "%edx", "memory", "cc");
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+ : "%eax", "%edx", "memory", "cc");
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return res;
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}
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@@ -178,13 +178,14 @@ static inline int glue(glue(lds, SUFFIX)
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"m" (*(uint32_t *)offsetof(CPUState, tlb_read[CPU_MEM_INDEX][0].address)),
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"i" (CPU_MEM_INDEX),
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"m" (*(uint8_t *)&glue(glue(__ld, SUFFIX), MMUSUFFIX))
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- : "%eax", "%ecx", "%edx", "memory", "cc");
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+ : "%eax", "%edx", "memory", "cc");
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return res;
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}
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#endif
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-static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v)
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+static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE val)
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{
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+ RES_TYPE v = val;
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asm volatile ("movl %0, %%edx\n"
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"movl %0, %%eax\n"
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"shrl %3, %%edx\n"
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@@ -236,16 +237,14 @@
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"2:\n"
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:
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: "r" (ptr),
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-/* NOTE: 'q' would be needed as constraint, but we could not use it
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- with T1 ! */
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- "r" (v),
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+ "q" (v),
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"i" ((CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS),
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"i" (TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS),
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"i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)),
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"m" (*(uint32_t *)offsetof(CPUState, tlb_table[CPU_MEM_INDEX][0].addr_write)),
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"i" (CPU_MEM_INDEX),
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"m" (*(uint8_t *)&glue(glue(__st, SUFFIX), MMUSUFFIX))
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- : "%eax", "%ecx", "%edx", "memory", "cc");
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+ : "%eax", "%edx", "memory", "cc");
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}
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/* TODO: handle 64-bit access sizes and addresses */
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