This website requires JavaScript.
Explore
Help
Register
Sign In
system
/
glibc
Watch
3
Star
0
Fork
0
You've already forked glibc
Code
Issues
Projects
Releases
Wiki
Activity
glibc
/
sysdeps
/
powerpc
/
powerpc64
/
power8
/
fpu
/
s_isinff.S
2 lines
54 B
ArmAsm
Raw
Normal View
History
Unescape
Escape
PowerPC: Optimized isinf/isinff for POWER8 This patch add a optimized isinf/isinff implementation for POWER8 using the new Move From VSR Doubleword instruction to gains some cycles from FP to GRP register move.
2014-02-27 09:45:41 -06:00
/* This function uses the same code as s_isinf.S. */
Reference in New Issue
Copy Permalink