hppa: Fix miscompilation of sched_setaffinity() [BZ #18480]

The attached change fixes the miscompilation of sched_setaffinity() on
hppa.  This is an old problem that was fixed on other architectures using
a similar approach to the attached change.  See:
https://sourceware.org/ml/libc-hacker/2004-04/msg00016.html

Build tested on trunk.  Patch has been applied to debian glibc for some time.
This commit is contained in:
John David Anglin 2015-08-07 11:54:19 -04:00 committed by Mike Frysinger
parent a601b74d31
commit 04ece7d2de
4 changed files with 56 additions and 23 deletions

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@ -1,3 +1,15 @@
2015-08-09 John David Anglin <danglin@gcc.gnu.org>
[BZ #18480]
* sysdeps/unix/sysv/linux/hppa/sysdep.h (LOAD_ARGS_0, LOAD_ARGS_1,
LOAD_ARGS_2, LOAD_ARGS_3, LOAD_ARGS_4, LOAD_ARGS_5, LOAD_ARGS_6):
Define.
(LOAD_REGS_0, LOAD_REGS_1, LOAD_REGS_2, LOAD_REGS_3, LOAD_REGS_4,
LOAD_REGS_5, LOAD_REGS_6): Update.
(INTERNAL_SYSCALL): Update using new LOAD defines.
(INTERNAL_SYSCALL_NCS): Likewise.
* sysdeps/unix/sysv/linux/hppa/syscall.c (syscall): Likewise.
2015-08-08 Paul Pluzhnikov <ppluzhnikov@google.com> 2015-08-08 Paul Pluzhnikov <ppluzhnikov@google.com>
[BZ #16734] [BZ #16734]

3
NEWS
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@ -8,7 +8,8 @@ using `glibc' in the "product" field.
Version 2.23 Version 2.23
* The following bugs are resolved with this release: * The following bugs are resolved with this release:
16517, 16519, 17905, 18265, 18525, 18618, 18647, 18661, 18787.
16517, 16519, 17905, 18480, 18265, 18525, 18618, 18647, 18661, 18787.
Version 2.22 Version 2.22

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@ -43,9 +43,10 @@ syscall (long int __sysno, ...)
va_end (args); va_end (args);
{ {
LOAD_ARGS_6 (arg0, arg1, arg2, arg3, arg4, arg5)
register unsigned long int __res asm("r28"); register unsigned long int __res asm("r28");
PIC_REG_DEF PIC_REG_DEF
LOAD_ARGS_6 (arg0, arg1, arg2, arg3, arg4, arg5) LOAD_REGS_6
asm volatile (SAVE_ASM_PIC asm volatile (SAVE_ASM_PIC
" ble 0x100(%%sr2, %%r0) \n" " ble 0x100(%%sr2, %%r0) \n"
" copy %1, %%r20 \n" " copy %1, %%r20 \n"

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@ -400,9 +400,10 @@ L(pre_end): ASM_LINE_SEP \
({ \ ({ \
long __sys_res; \ long __sys_res; \
{ \ { \
LOAD_ARGS_##nr(args) \
register unsigned long __res asm("r28"); \ register unsigned long __res asm("r28"); \
PIC_REG_DEF \ PIC_REG_DEF \
LOAD_ARGS_##nr(args) \ LOAD_REGS_##nr \
/* FIXME: HACK save/load r19 around syscall */ \ /* FIXME: HACK save/load r19 around syscall */ \
asm volatile( \ asm volatile( \
SAVE_ASM_PIC \ SAVE_ASM_PIC \
@ -425,9 +426,10 @@ L(pre_end): ASM_LINE_SEP \
({ \ ({ \
long __sys_res; \ long __sys_res; \
{ \ { \
LOAD_ARGS_##nr(args) \
register unsigned long __res asm("r28"); \ register unsigned long __res asm("r28"); \
PIC_REG_DEF \ PIC_REG_DEF \
LOAD_ARGS_##nr(args) \ LOAD_REGS_##nr \
/* FIXME: HACK save/load r19 around syscall */ \ /* FIXME: HACK save/load r19 around syscall */ \
asm volatile( \ asm volatile( \
SAVE_ASM_PIC \ SAVE_ASM_PIC \
@ -443,27 +445,44 @@ L(pre_end): ASM_LINE_SEP \
__sys_res; \ __sys_res; \
}) })
#define LOAD_ARGS_0() #define LOAD_ARGS_0()
#define LOAD_ARGS_1(r26) \ #define LOAD_REGS_0
register unsigned long __r26 __asm__("r26") = (unsigned long)(r26); \ #define LOAD_ARGS_1(a1) \
register unsigned long __x26 = (unsigned long)(a1); \
LOAD_ARGS_0() LOAD_ARGS_0()
#define LOAD_ARGS_2(r26,r25) \ #define LOAD_REGS_1 \
register unsigned long __r25 __asm__("r25") = (unsigned long)(r25); \ register unsigned long __r26 __asm__("r26") = __x26; \
LOAD_ARGS_1(r26) LOAD_REGS_0
#define LOAD_ARGS_3(r26,r25,r24) \ #define LOAD_ARGS_2(a1,a2) \
register unsigned long __r24 __asm__("r24") = (unsigned long)(r24); \ register unsigned long __x25 = (unsigned long)(a2); \
LOAD_ARGS_2(r26,r25) LOAD_ARGS_1(a1)
#define LOAD_ARGS_4(r26,r25,r24,r23) \ #define LOAD_REGS_2 \
register unsigned long __r23 __asm__("r23") = (unsigned long)(r23); \ register unsigned long __r25 __asm__("r25") = __x25; \
LOAD_ARGS_3(r26,r25,r24) LOAD_REGS_1
#define LOAD_ARGS_5(r26,r25,r24,r23,r22) \ #define LOAD_ARGS_3(a1,a2,a3) \
register unsigned long __r22 __asm__("r22") = (unsigned long)(r22); \ register unsigned long __x24 = (unsigned long)(a3); \
LOAD_ARGS_4(r26,r25,r24,r23) LOAD_ARGS_2(a1,a2)
#define LOAD_ARGS_6(r26,r25,r24,r23,r22,r21) \ #define LOAD_REGS_3 \
register unsigned long __r21 __asm__("r21") = (unsigned long)(r21); \ register unsigned long __r24 __asm__("r24") = __x24; \
LOAD_ARGS_5(r26,r25,r24,r23,r22) LOAD_REGS_2
#define LOAD_ARGS_4(a1,a2,a3,a4) \
register unsigned long __x23 = (unsigned long)(a4); \
LOAD_ARGS_3(a1,a2,a3)
#define LOAD_REGS_4 \
register unsigned long __r23 __asm__("r23") = __x23; \
LOAD_REGS_3
#define LOAD_ARGS_5(a1,a2,a3,a4,a5) \
register unsigned long __x22 = (unsigned long)(a5); \
LOAD_ARGS_4(a1,a2,a3,a4)
#define LOAD_REGS_5 \
register unsigned long __r22 __asm__("r22") = __x22; \
LOAD_REGS_4
#define LOAD_ARGS_6(a1,a2,a3,a4,a5,a6) \
register unsigned long __x21 = (unsigned long)(a6); \
LOAD_ARGS_5(a1,a2,a3,a4,a5)
#define LOAD_REGS_6 \
register unsigned long __r21 __asm__("r21") = __x21; \
LOAD_REGS_5
/* Even with zero args we use r20 for the syscall number */ /* Even with zero args we use r20 for the syscall number */
#define ASM_ARGS_0 #define ASM_ARGS_0