Wed May 22 00:40:50 1996 David Mosberger-Tang <davidm@azstarnet.com>
* sysdeps/alpha/divrem.h: Renamed from sysdeps/alpha/divrem.S to avoid name collision with math library.
This commit is contained in:
Roland McGrath
parent
a391dca8fa
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2810021b9b
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/* Copyright (C) 1996 Free Software Foundation, Inc.
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Contributed by David Mosberger (davidm@cs.arizona.edu).
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Library General Public License as
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published by the Free Software Foundation; either version 2 of the
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License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Library General Public License for more details.
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You should have received a copy of the GNU Library General Public
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License along with the GNU C Library; see the file COPYING.LIB. If
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not, write to the Free Software Foundation, Inc., 675 Mass Ave,
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Cambridge, MA 02139, USA. */
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/* The current Alpha chips don't provide hardware for integer
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division. The C compiler expects the functions
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__divqu: 64-bit unsigned long divide
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__remqu: 64-bit unsigned long remainder
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__divqs/__remqs: signed 64-bit
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__divlu/__remlu: unsigned 32-bit
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__divls/__remls: signed 32-bit
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These are not normal C functions: instead of the normal calling
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sequence, these expect their arguments in registers t10 and t11, and
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return the result in t12 (aka pv). Registers AT and v0 may be
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clobbered (assembly temporary), anything else must be saved. */
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#ifdef __linux__
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# include <alpha/regdef.h>
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# include <asm/gentrap.h>
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# include <asm/pal.h>
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#else
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# include <regdef.h>
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# include <machine/pal.h>
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#endif
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#ifdef DEBUG
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# define arg1 a0
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# define arg2 a1
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# define result v0
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# define mask t0
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# define tmp0 t1
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# define tmp1 t2
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# define sign t3
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# define retaddr ra
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#else
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# define arg1 t10
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# define arg2 t11
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# define result t12
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# define mask v0
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# define tmp0 t0
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# define tmp1 t1
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# define sign t2
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# define retaddr t9
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#endif
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# define divisor arg2
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#if IS_REM
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# define dividend result
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# define quotient arg1
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# define GETDIVIDEND bis arg1,zero,dividend
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#else
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# define dividend arg1
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# define quotient result
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# define GETDIVIDEND
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#endif
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#if SIZE == 8
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# define LONGIFYarg1 GETDIVIDEND
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# define LONGIFYarg2
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#else
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# if SIGNED
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# define LONGIFYarg1 addl arg1,zero,dividend
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# define LONGIFYarg2 addl arg2,zero,divisor
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# else
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# define LONGIFYarg1 zapnot arg1,0x0f,dividend
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# define LONGIFYarg2 zapnot arg2,0x0f,divisor
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# endif
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#endif
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#if SIGNED
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# define SETSIGN(sign,reg,tmp) subq zero,reg,tmp; cmovlt sign,tmp,reg
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# if IS_REM
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# define GETSIGN(x,y,s) bis x,zero,s
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# else
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# define GETSIGN(x,y,s) xor x,y,s
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# endif
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#else
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# define SETSIGN(sign,reg,tmp)
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# define GETSIGN(x,y,s)
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#endif
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.set noreorder
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.set noat
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.ent FUNC_NAME
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.globl FUNC_NAME
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.align 5
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FUNC_NAME:
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# define FRAME_SIZE 0x30
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.frame sp,FRAME_SIZE,ra,0
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lda sp,-FRAME_SIZE(sp)
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.prologue 1
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stq arg1,0x00(sp)
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LONGIFYarg1
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stq arg2,0x08(sp)
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LONGIFYarg2
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stq mask,0x10(sp)
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bis zero,1,mask
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stq tmp0,0x18(sp)
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bis zero,zero,quotient
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stq tmp1,0x20(sp)
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beq divisor,divbyzero
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stq sign,0x28(sp)
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GETSIGN(dividend,divisor,sign)
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#if SIGNED
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subq zero,dividend,tmp0
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subq zero,divisor,tmp1
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cmovlt dividend,tmp0,dividend
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cmovlt divisor,tmp1,divisor
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#endif
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/*
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* Shift divisor left until either bit 63 is set or until it
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* is at least as big as the dividend:
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*/
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.align 3
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1: cmpule dividend,divisor,AT
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blt divisor,2f
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blbs AT,2f
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addq mask,mask,mask
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addq divisor,divisor,divisor
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br 1b
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.align 3
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2: addq mask,quotient,tmp0
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cmpule divisor,dividend,AT
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subq dividend,divisor,tmp1
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srl divisor,1,divisor
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srl mask,1,mask
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cmovlbs AT,tmp0,quotient
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cmovlbs AT,tmp1,dividend
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bne mask,2b
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ldq arg1,0x00(sp)
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SETSIGN(sign,result,tmp0)
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done: ldq arg2,0x08(sp)
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ldq mask,0x10(sp)
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ldq tmp0,0x18(sp)
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ldq tmp1,0x20(sp)
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ldq sign,0x28(sp)
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lda sp,FRAME_SIZE(sp)
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ret zero,(retaddr),0
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divbyzero:
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lda a0,GEN_INTDIV(zero)
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call_pal PAL_gentrap
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bis zero,zero,result /* if trap returns, return 0 */
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ldq arg1,0x00(sp)
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br done
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.end FUNC_NAME
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188
sysdeps/alpha/divrem.h
Normal file
188
sysdeps/alpha/divrem.h
Normal file
@ -0,0 +1,188 @@
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/* Copyright (C) 1996 Free Software Foundation, Inc.
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Contributed by David Mosberger (davidm@cs.arizona.edu).
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Library General Public License as
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published by the Free Software Foundation; either version 2 of the
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License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Library General Public License for more details.
|
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You should have received a copy of the GNU Library General Public
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License along with the GNU C Library; see the file COPYING.LIB. If
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not, write to the Free Software Foundation, Inc., 675 Mass Ave,
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Cambridge, MA 02139, USA. */
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/* The current Alpha chips don't provide hardware for integer
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division. The C compiler expects the functions
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__divqu: 64-bit unsigned long divide
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__remqu: 64-bit unsigned long remainder
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__divqs/__remqs: signed 64-bit
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__divlu/__remlu: unsigned 32-bit
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__divls/__remls: signed 32-bit
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These are not normal C functions: instead of the normal calling
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sequence, these expect their arguments in registers t10 and t11, and
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return the result in t12 (aka pv). Registers AT and v0 may be
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clobbered (assembly temporary), anything else must be saved. */
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#ifdef __linux__
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# include <alpha/regdef.h>
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# include <asm/gentrap.h>
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# include <asm/pal.h>
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#else
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# include <regdef.h>
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# include <machine/pal.h>
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#endif
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#ifdef DEBUG
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# define arg1 a0
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# define arg2 a1
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# define result v0
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# define mask t0
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# define tmp0 t1
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# define tmp1 t2
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# define sign t3
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# define retaddr ra
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#else
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# define arg1 t10
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# define arg2 t11
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# define result t12
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# define mask v0
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# define tmp0 t0
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# define tmp1 t1
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# define sign t2
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# define retaddr t9
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#endif
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# define divisor arg2
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#if IS_REM
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# define dividend result
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# define quotient arg1
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# define GETDIVIDEND bis arg1,zero,dividend
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#else
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# define dividend arg1
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# define quotient result
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# define GETDIVIDEND
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#endif
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#if SIZE == 8
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# define LONGIFYarg1 GETDIVIDEND
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# define LONGIFYarg2
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#else
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# if SIGNED
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# define LONGIFYarg1 addl arg1,zero,dividend
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# define LONGIFYarg2 addl arg2,zero,divisor
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# else
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# define LONGIFYarg1 zapnot arg1,0x0f,dividend
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# define LONGIFYarg2 zapnot arg2,0x0f,divisor
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# endif
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#endif
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#if SIGNED
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# define SETSIGN(sign,reg,tmp) subq zero,reg,tmp; cmovlt sign,tmp,reg
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# if IS_REM
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# define GETSIGN(x,y,s) bis x,zero,s
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# else
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# define GETSIGN(x,y,s) xor x,y,s
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# endif
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#else
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# define SETSIGN(sign,reg,tmp)
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# define GETSIGN(x,y,s)
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#endif
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.set noreorder
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.set noat
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.ent FUNC_NAME
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.globl FUNC_NAME
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#define FRAME_SIZE 0x30
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.align 5
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FUNC_NAME:
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#ifdef PROF
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lda sp, -0x18(sp)
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stq ra, 0x00(sp)
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stq pv, 0x08(sp)
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stq gp, 0x10(sp)
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br AT, 1f
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1: ldgp gp, 0(AT)
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lda AT, _mcount
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mov retaddr, ra
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jsr AT, (AT), _mcount
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ldq ra, 0x00(sp)
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ldq pv, 0x08(sp)
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ldq gp, 0x10(sp)
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lda sp, 0x18(sp)
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#endif
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.frame sp, FRAME_SIZE, ra, 0
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lda sp,-FRAME_SIZE(sp)
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.prologue 1
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stq arg1,0x00(sp)
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LONGIFYarg1
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stq arg2,0x08(sp)
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LONGIFYarg2
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stq mask,0x10(sp)
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bis zero,1,mask
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stq tmp0,0x18(sp)
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bis zero,zero,quotient
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stq tmp1,0x20(sp)
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beq divisor,divbyzero
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stq sign,0x28(sp)
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GETSIGN(dividend,divisor,sign)
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#if SIGNED
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subq zero,dividend,tmp0
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subq zero,divisor,tmp1
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cmovlt dividend,tmp0,dividend
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cmovlt divisor,tmp1,divisor
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#endif
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/*
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* Shift divisor left until either bit 63 is set or until it
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* is at least as big as the dividend:
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*/
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.align 3
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1: cmpule dividend,divisor,AT
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blt divisor,2f
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blbs AT,2f
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addq mask,mask,mask
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addq divisor,divisor,divisor
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br 1b
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.align 3
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2: addq mask,quotient,tmp0
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cmpule divisor,dividend,AT
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subq dividend,divisor,tmp1
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srl divisor,1,divisor
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srl mask,1,mask
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cmovlbs AT,tmp0,quotient
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cmovlbs AT,tmp1,dividend
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bne mask,2b
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ldq arg1,0x00(sp)
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SETSIGN(sign,result,tmp0)
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done: ldq arg2,0x08(sp)
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ldq mask,0x10(sp)
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ldq tmp0,0x18(sp)
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ldq tmp1,0x20(sp)
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ldq sign,0x28(sp)
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lda sp,FRAME_SIZE(sp)
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ret zero,(retaddr),0
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divbyzero:
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lda a0,GEN_INTDIV(zero)
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call_pal PAL_gentrap
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bis zero,zero,result /* if trap returns, return 0 */
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ldq arg1,0x00(sp)
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br done
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.end FUNC_NAME
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