Add Niagara-4 optimized memset/bzero implementation.
* sysdeps/sparc/sparc64/multiarch/memset-niagara4.S: New file. * sysdeps/sparc/sparc32/sparcv9/multiarch/memset-niagara4.S: New file. * sysdeps/sparc/sparc64/multiarch/Makefile: Add to sysdep_routines. * sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile: Likewise. * sysdeps/sparc/sparc64/multiarch/memset.S: Use Niagara-4 memset and bzero when HWCAP_SPARC_CRYPTO is present.
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ChangeLog
11
ChangeLog
@ -1,3 +1,14 @@
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2012-10-05 David S. Miller <davem@davemloft.net>
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* sysdeps/sparc/sparc64/multiarch/memset-niagara4.S: New file.
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* sysdeps/sparc/sparc32/sparcv9/multiarch/memset-niagara4.S: New
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file.
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* sysdeps/sparc/sparc64/multiarch/Makefile: Add to
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sysdep_routines.
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* sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile: Likewise.
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* sysdeps/sparc/sparc64/multiarch/memset.S: Use Niagara-4 memset
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and bzero when HWCAP_SPARC_CRYPTO is present.
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2012-10-05 H.J. Lu <hongjiu.lu@intel.com>
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[BZ #14602]
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@ -1,4 +1,4 @@
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ifeq ($(subdir),string)
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sysdep_routines += memcpy-ultra3 memcpy-niagara1 memcpy-niagara2 \
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memset-niagara1 memcpy-niagara4
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memset-niagara1 memcpy-niagara4 memset-niagara4
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endif
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@ -0,0 +1 @@
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#include <sparc64/multiarch/memset-niagara4.S>
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@ -1,4 +1,4 @@
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ifeq ($(subdir),string)
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sysdep_routines += memcpy-ultra3 memcpy-niagara1 memcpy-niagara2 \
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memset-niagara1 memcpy-niagara4
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memset-niagara1 memcpy-niagara4 memset-niagara4
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endif
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124
sysdeps/sparc/sparc64/multiarch/memset-niagara4.S
Normal file
124
sysdeps/sparc/sparc64/multiarch/memset-niagara4.S
Normal file
@ -0,0 +1,124 @@
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/* Set a block of memory to some byte value. For SUN4V Niagara-4.
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Copyright (C) 2012 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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Contributed by David S. Miller (davem@davemloft.net)
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<http://www.gnu.org/licenses/>. */
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#include <sysdep.h>
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#define ASI_BLK_INIT_QUAD_LDD_P 0xe2
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#if !defined NOT_IN_libc
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.register %g2, #scratch
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.register %g3, #scratch
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.text
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.align 32
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ENTRY(__memset_niagara4)
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andcc %o1, 0xff, %o4
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be,pt %icc, 1f
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mov %o2, %o1
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sllx %o4, 8, %g1
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or %g1, %o4, %o2
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sllx %o2, 16, %g1
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or %g1, %o2, %o2
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sllx %o2, 32, %g1
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ba,pt %icc, 1f
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or %g1, %o2, %o4
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END(__memset_niagara4)
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.align 32
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ENTRY(__bzero_niagara4)
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clr %o4
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1: cmp %o1, 16
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ble %icc, .Ltiny
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mov %o0, %o3
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sub %g0, %o0, %g1
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and %g1, 0x7, %g1
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brz,pt %g1, .Laligned8
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sub %o1, %g1, %o1
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1: stb %o4, [%o0 + 0x00]
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subcc %g1, 1, %g1
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bne,pt %icc, 1b
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add %o0, 1, %o0
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.Laligned8:
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cmp %o1, 64 + (64 - 8)
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ble .Lmedium
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sub %g0, %o0, %g1
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andcc %g1, (64 - 1), %g1
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brz,pn %g1, .Laligned64
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sub %o1, %g1, %o1
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1: stx %o4, [%o0 + 0x00]
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subcc %g1, 8, %g1
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bne,pt %icc, 1b
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add %o0, 0x8, %o0
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.Laligned64:
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andn %o1, 64 - 1, %g1
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sub %o1, %g1, %o1
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brnz,pn %o4, .Lnon_bzero_loop
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mov 0x20, %g2
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1: stxa %o4, [%o0 + %g0] ASI_BLK_INIT_QUAD_LDD_P
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subcc %g1, 0x40, %g1
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stxa %o4, [%o0 + %g2] ASI_BLK_INIT_QUAD_LDD_P
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bne,pt %icc, 1b
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add %o0, 0x40, %o0
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.Lpostloop:
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cmp %o1, 8
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bl,pn %icc, .Ltiny
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membar #StoreStore|#StoreLoad
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.Lmedium:
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andn %o1, 0x7, %g1
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sub %o1, %g1, %o1
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1: stx %o4, [%o0 + 0x00]
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subcc %g1, 0x8, %g1
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bne,pt %icc, 1b
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add %o0, 0x08, %o0
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andcc %o1, 0x4, %g1
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be,pt %icc, .Ltiny
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sub %o1, %g1, %o1
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stw %o4, [%o0 + 0x00]
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add %o0, 0x4, %o0
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.Ltiny:
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cmp %o1, 0
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be,pn %icc, .Lexit
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1: subcc %o1, 1, %o1
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stb %o4, [%o0 + 0x00]
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bne,pt %icc, 1b
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add %o0, 1, %o0
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.Lexit:
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retl
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mov %o3, %o0
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.Lnon_bzero_loop:
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mov 0x08, %g3
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mov 0x28, %o5
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1: stxa %o4, [%o0 + %g0] ASI_BLK_INIT_QUAD_LDD_P
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subcc %g1, 0x40, %g1
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stxa %o4, [%o0 + %g2] ASI_BLK_INIT_QUAD_LDD_P
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stxa %o4, [%o0 + %g3] ASI_BLK_INIT_QUAD_LDD_P
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stxa %o4, [%o0 + %o5] ASI_BLK_INIT_QUAD_LDD_P
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add %o0, 0x10, %o0
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stxa %o4, [%o0 + %g0] ASI_BLK_INIT_QUAD_LDD_P
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stxa %o4, [%o0 + %g2] ASI_BLK_INIT_QUAD_LDD_P
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stxa %o4, [%o0 + %g3] ASI_BLK_INIT_QUAD_LDD_P
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stxa %o4, [%o0 + %o5] ASI_BLK_INIT_QUAD_LDD_P
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bne,pt %icc, 1b
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add %o0, 0x30, %o0
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ba,a,pt %icc, .Lpostloop
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END(__bzero_niagara4)
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#endif
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@ -26,8 +26,19 @@ ENTRY(memset)
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# ifdef SHARED
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SETUP_PIC_REG_LEAF(o3, o5)
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# endif
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andcc %o0, HWCAP_SPARC_BLKINIT, %g0
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be 9f
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set HWCAP_SPARC_CRYPTO, %o1
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andcc %o0, %o1, %g0
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be 1f
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andcc %o0, HWCAP_SPARC_BLKINIT, %g0
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# ifdef SHARED
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sethi %gdop_hix22(__memset_niagara4), %o1
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xor %o1, %gdop_lox10(__memset_niagara4), %o1
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# else
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set __memset_niagara4, %o1
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# endif
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ba 10f
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nop
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1: be 9f
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nop
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# ifdef SHARED
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sethi %gdop_hix22(__memset_niagara1), %o1
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@ -57,8 +68,19 @@ ENTRY(__bzero)
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# ifdef SHARED
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SETUP_PIC_REG_LEAF(o3, o5)
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# endif
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andcc %o0, HWCAP_SPARC_BLKINIT, %g0
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be 9f
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set HWCAP_SPARC_CRYPTO, %o1
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andcc %o0, %o1, %g0
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be 1f
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andcc %o0, HWCAP_SPARC_BLKINIT, %g0
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# ifdef SHARED
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sethi %gdop_hix22(__bzero_niagara4), %o1
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xor %o1, %gdop_lox10(__bzero_niagara4), %o1
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# else
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set __bzero_niagara4, %o1
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# endif
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ba 10f
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nop
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1: be 9f
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nop
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# ifdef SHARED
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sethi %gdop_hix22(__bzero_niagara1), %o1
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