New file.

This commit is contained in:
Andreas Jaeger 2005-03-28 09:15:45 +00:00
parent 0af5154802
commit 638418213e

View File

@ -1,4 +1,5 @@
/* Copyright (C) 1997, 1998, 2002, 2003, 2004 Free Software Foundation, Inc.
/* Copyright (C) 1997, 1998, 2002, 2003, 2004, 2005
Free Software Foundation, Inc.
This file is part of the GNU C Library.
Contributed by Ralf Baechle <ralf@gnu.org>.
@ -470,4 +471,20 @@ symbol = value
# define MTC0 dmtc0
#endif
/* The MIPS archtectures do not have a uniform memory model. Particular
platforms may provide additional guarantees - for instance, the R4000
LL and SC instructions implicitly perform a SYNC, and the 4K promises
strong ordering.
However, in the absence of those guarantees, we must assume weak ordering
and SYNC explicitly where necessary.
Some obsolete MIPS processors may not support the SYNC instruction. This
applies to "true" MIPS I processors; most of the processors which compile
using MIPS I implement parts of MIPS II. */
#ifndef MIPS_SYNC
# define MIPS_SYNC sync
#endif
#endif /* sys/asm.h */