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/* Copyright (C) 1997, 1998, 2002, 2003, 2004 Free Software Foundation, Inc.
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/* Copyright (C) 1997, 1998, 2002, 2003, 2004, 2005
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Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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Contributed by Ralf Baechle <ralf@gnu.org>.
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@ -470,4 +471,20 @@ symbol = value
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# define MTC0 dmtc0
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#endif
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/* The MIPS archtectures do not have a uniform memory model. Particular
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platforms may provide additional guarantees - for instance, the R4000
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LL and SC instructions implicitly perform a SYNC, and the 4K promises
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strong ordering.
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However, in the absence of those guarantees, we must assume weak ordering
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and SYNC explicitly where necessary.
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Some obsolete MIPS processors may not support the SYNC instruction. This
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applies to "true" MIPS I processors; most of the processors which compile
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using MIPS I implement parts of MIPS II. */
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#ifndef MIPS_SYNC
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# define MIPS_SYNC sync
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#endif
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#endif /* sys/asm.h */
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