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Use LP_SIZE and ASM_ADDR in pthread_once.S

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H.J. Lu 2012-05-15 10:24:19 -07:00
parent 592f90e6ec
commit 6cae4b26ca
2 changed files with 9 additions and 3 deletions
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6
nptl/ChangeLog
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@ -1,3 +1,9 @@
2012-05-15 H.J. Lu <hongjiu.lu@intel.com>
* sysdeps/unix/sysv/linux/x86_64/pthread_once.S
(__gcc_personality_v0): Replace 8-byte data alignment with
LP_SIZE alignment and .quad with ASM_ADDR.
2012-05-15 H.J. Lu <hongjiu.lu@intel.com> 2012-05-15 H.J. Lu <hongjiu.lu@intel.com>
* sysdeps/unix/sysv/linux/x86_64/pthread_cond_wait.S: Use * sysdeps/unix/sysv/linux/x86_64/pthread_cond_wait.S: Use

6
nptl/sysdeps/unix/sysv/linux/x86_64/pthread_once.S
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@ -188,9 +188,9 @@ clear_once_control:
.hidden DW.ref.__gcc_personality_v0 .hidden DW.ref.__gcc_personality_v0
.weak DW.ref.__gcc_personality_v0 .weak DW.ref.__gcc_personality_v0
.section .gnu.linkonce.d.DW.ref.__gcc_personality_v0,"aw",@progbits .section .gnu.linkonce.d.DW.ref.__gcc_personality_v0,"aw",@progbits
.align 8 .align LP_SIZE
.type DW.ref.__gcc_personality_v0, @object .type DW.ref.__gcc_personality_v0, @object
.size DW.ref.__gcc_personality_v0, 8 .size DW.ref.__gcc_personality_v0, LP_SIZE
DW.ref.__gcc_personality_v0: DW.ref.__gcc_personality_v0:
.quad __gcc_personality_v0 ASM_ADDR __gcc_personality_v0
#endif #endif