S/390: Fix rt_sigprocmask syscall invocation in get/set/swapcontext.

This commit is contained in:
Andreas Krebbel 2013-03-05 08:15:33 +01:00
parent cfb6382a4f
commit c3e94a9533
8 changed files with 111 additions and 86 deletions

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@ -1,3 +1,14 @@
2013-03-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* sysdeps/unix/sysv/linux/s390/s390-32/getcontext.S: Set the
fourth parameter needed for rt_sigprocmask syscall.
* sysdeps/unix/sysv/linux/s390/s390-32/setcontext.S:
* sysdeps/unix/sysv/linux/s390/s390-32/swapcontext.S: Likewise.
* sysdeps/unix/sysv/linux/s390/s390-64/getcontext.S: Likewise.
* sysdeps/unix/sysv/linux/s390/s390-64/setcontext.S: Likewise.
* sysdeps/unix/sysv/linux/s390/s390-64/swapcontext.S: Likewise.
* sysdeps/unix/sysv/linux/s390/ucontext_i.sym: Define _NSIG8.
2013-03-04 Joseph Myers <joseph@codesourcery.com> 2013-03-04 Joseph Myers <joseph@codesourcery.com>
[BZ #13550] [BZ #13550]

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@ -31,41 +31,42 @@
other than the PRESERVED state. */ other than the PRESERVED state. */
ENTRY(__getcontext) ENTRY(__getcontext)
lr %r5,%r2 lr %r1,%r2
/* sigprocmask (SIG_BLOCK, NULL, &sc->sc_mask). */ /* sigprocmask (SIG_BLOCK, NULL, &sc->sc_mask). */
la %r2,SIG_BLOCK la %r2,SIG_BLOCK
slr %r3,%r3 slr %r3,%r3
la %r4,SC_MASK(%r5) la %r4,SC_MASK(%r1)
lhi %r5,_NSIG8
svc SYS_ify(rt_sigprocmask) svc SYS_ify(rt_sigprocmask)
/* Store fpu context. */ /* Store fpu context. */
stfpc SC_FPC(%r5) stfpc SC_FPC(%r1)
std %f0,SC_FPRS(%r5) std %f0,SC_FPRS(%r1)
std %f1,SC_FPRS+8(%r5) std %f1,SC_FPRS+8(%r1)
std %f2,SC_FPRS+16(%r5) std %f2,SC_FPRS+16(%r1)
std %f3,SC_FPRS+24(%r5) std %f3,SC_FPRS+24(%r1)
std %f4,SC_FPRS+32(%r5) std %f4,SC_FPRS+32(%r1)
std %f5,SC_FPRS+40(%r5) std %f5,SC_FPRS+40(%r1)
std %f6,SC_FPRS+48(%r5) std %f6,SC_FPRS+48(%r1)
std %f7,SC_FPRS+56(%r5) std %f7,SC_FPRS+56(%r1)
std %f8,SC_FPRS+64(%r5) std %f8,SC_FPRS+64(%r1)
std %f9,SC_FPRS+72(%r5) std %f9,SC_FPRS+72(%r1)
std %f10,SC_FPRS+80(%r5) std %f10,SC_FPRS+80(%r1)
std %f11,SC_FPRS+88(%r5) std %f11,SC_FPRS+88(%r1)
std %f12,SC_FPRS+96(%r5) std %f12,SC_FPRS+96(%r1)
std %f13,SC_FPRS+104(%r5) std %f13,SC_FPRS+104(%r1)
std %f14,SC_FPRS+112(%r5) std %f14,SC_FPRS+112(%r1)
std %f15,SC_FPRS+120(%r5) std %f15,SC_FPRS+120(%r1)
/* Set __getcontext return value to 0. */ /* Set __getcontext return value to 0. */
slr %r2,%r2 slr %r2,%r2
/* Store access registers. */ /* Store access registers. */
stam %a0,%a15,SC_ACRS(%r5) stam %a0,%a15,SC_ACRS(%r1)
/* Store general purpose registers. */ /* Store general purpose registers. */
stm %r0,%r15,SC_GPRS(%r5) stm %r0,%r15,SC_GPRS(%r1)
/* Return. */ /* Return. */
br %r14 br %r14

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@ -31,38 +31,39 @@
other than the PRESERVED state. */ other than the PRESERVED state. */
ENTRY(__setcontext) ENTRY(__setcontext)
lr %r5,%r2 lr %r1,%r2
/* sigprocmask (SIG_SETMASK, &sc->sc_mask, NULL). */ /* sigprocmask (SIG_SETMASK, &sc->sc_mask, NULL). */
la %r2,SIG_BLOCK la %r2,SIG_BLOCK
la %r3,SC_MASK(%r5) la %r3,SC_MASK(%r1)
slr %r4,%r4 slr %r4,%r4
lhi %r5,_NSIG8
svc SYS_ify(rt_sigprocmask) svc SYS_ify(rt_sigprocmask)
/* Load fpu context. */ /* Load fpu context. */
lfpc SC_FPC(%r5) lfpc SC_FPC(%r1)
ld %f0,SC_FPRS(%r5) ld %f0,SC_FPRS(%r1)
ld %f1,SC_FPRS+8(%r5) ld %f1,SC_FPRS+8(%r1)
ld %f2,SC_FPRS+16(%r5) ld %f2,SC_FPRS+16(%r1)
ld %f3,SC_FPRS+24(%r5) ld %f3,SC_FPRS+24(%r1)
ld %f4,SC_FPRS+32(%r5) ld %f4,SC_FPRS+32(%r1)
ld %f5,SC_FPRS+40(%r5) ld %f5,SC_FPRS+40(%r1)
ld %f6,SC_FPRS+48(%r5) ld %f6,SC_FPRS+48(%r1)
ld %f7,SC_FPRS+56(%r5) ld %f7,SC_FPRS+56(%r1)
ld %f8,SC_FPRS+64(%r5) ld %f8,SC_FPRS+64(%r1)
ld %f9,SC_FPRS+72(%r5) ld %f9,SC_FPRS+72(%r1)
ld %f10,SC_FPRS+80(%r5) ld %f10,SC_FPRS+80(%r1)
ld %f11,SC_FPRS+88(%r5) ld %f11,SC_FPRS+88(%r1)
ld %f12,SC_FPRS+96(%r5) ld %f12,SC_FPRS+96(%r1)
ld %f13,SC_FPRS+104(%r5) ld %f13,SC_FPRS+104(%r1)
ld %f14,SC_FPRS+112(%r5) ld %f14,SC_FPRS+112(%r1)
ld %f15,SC_FPRS+120(%r5) ld %f15,SC_FPRS+120(%r1)
/* Don't touch %a0, used for thread purposes. */ /* Don't touch %a0, used for thread purposes. */
lam %a1,%a15,SC_ACRS+4(%r5) lam %a1,%a15,SC_ACRS+4(%r1)
/* Load general purpose registers. */ /* Load general purpose registers. */
lm %r0,%r15,SC_GPRS(%r5) lm %r0,%r15,SC_GPRS(%r1)
/* Return. */ /* Return. */
br %r14 br %r14

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@ -34,12 +34,13 @@
ENTRY(__swapcontext) ENTRY(__swapcontext)
lr %r1,%r2 lr %r1,%r2
lr %r5,%r3 lr %r0,%r3
/* sigprocmask (SIG_BLOCK, NULL, &sc->sc_mask). */ /* sigprocmask (SIG_BLOCK, NULL, &sc->sc_mask). */
la %r2,SIG_BLOCK la %r2,SIG_BLOCK
slr %r3,%r3 slr %r3,%r3
la %r4,SC_MASK(%r1) la %r4,SC_MASK(%r1)
lhi %r5,_NSIG8
svc SYS_ify(rt_sigprocmask) svc SYS_ify(rt_sigprocmask)
/* Store fpu context. */ /* Store fpu context. */
@ -72,11 +73,14 @@ ENTRY(__swapcontext)
/* sigprocmask (SIG_SETMASK, &sc->sc_mask, NULL). */ /* sigprocmask (SIG_SETMASK, &sc->sc_mask, NULL). */
la %r2,SIG_BLOCK la %r2,SIG_BLOCK
lr %r5,%r0
la %r3,SC_MASK(%r5) la %r3,SC_MASK(%r5)
slr %r4,%r4 slr %r4,%r4
lhi %r5,_NSIG8
svc SYS_ify(rt_sigprocmask) svc SYS_ify(rt_sigprocmask)
/* Load fpu context. */ /* Load fpu context. */
lr %r5,%r0
lfpc SC_FPC(%r5) lfpc SC_FPC(%r5)
ld %f0,SC_FPRS(%r5) ld %f0,SC_FPRS(%r5)
ld %f1,SC_FPRS+8(%r5) ld %f1,SC_FPRS+8(%r5)

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@ -31,41 +31,42 @@
other than the PRESERVED state. */ other than the PRESERVED state. */
ENTRY(__getcontext) ENTRY(__getcontext)
lgr %r5,%r2 lgr %r1,%r2
/* sigprocmask (SIG_BLOCK, NULL, &sc->sc_mask). */ /* sigprocmask (SIG_BLOCK, NULL, &sc->sc_mask). */
la %r2,SIG_BLOCK la %r2,SIG_BLOCK
slgr %r3,%r3 slgr %r3,%r3
la %r4,SC_MASK(%r5) la %r4,SC_MASK(%r1)
lghi %r5,_NSIG8
svc SYS_ify(rt_sigprocmask) svc SYS_ify(rt_sigprocmask)
/* Store fpu context. */ /* Store fpu context. */
stfpc SC_FPC(%r5) stfpc SC_FPC(%r1)
std %f0,SC_FPRS(%r5) std %f0,SC_FPRS(%r1)
std %f1,SC_FPRS+8(%r5) std %f1,SC_FPRS+8(%r1)
std %f2,SC_FPRS+16(%r5) std %f2,SC_FPRS+16(%r1)
std %f3,SC_FPRS+24(%r5) std %f3,SC_FPRS+24(%r1)
std %f4,SC_FPRS+32(%r5) std %f4,SC_FPRS+32(%r1)
std %f5,SC_FPRS+40(%r5) std %f5,SC_FPRS+40(%r1)
std %f6,SC_FPRS+48(%r5) std %f6,SC_FPRS+48(%r1)
std %f7,SC_FPRS+56(%r5) std %f7,SC_FPRS+56(%r1)
std %f8,SC_FPRS+64(%r5) std %f8,SC_FPRS+64(%r1)
std %f9,SC_FPRS+72(%r5) std %f9,SC_FPRS+72(%r1)
std %f10,SC_FPRS+80(%r5) std %f10,SC_FPRS+80(%r1)
std %f11,SC_FPRS+88(%r5) std %f11,SC_FPRS+88(%r1)
std %f12,SC_FPRS+96(%r5) std %f12,SC_FPRS+96(%r1)
std %f13,SC_FPRS+104(%r5) std %f13,SC_FPRS+104(%r1)
std %f14,SC_FPRS+112(%r5) std %f14,SC_FPRS+112(%r1)
std %f15,SC_FPRS+120(%r5) std %f15,SC_FPRS+120(%r1)
/* Set __getcontext return value to 0. */ /* Set __getcontext return value to 0. */
slgr %r2,%r2 slgr %r2,%r2
/* Store access registers. */ /* Store access registers. */
stam %a0,%a15,SC_ACRS(%r5) stam %a0,%a15,SC_ACRS(%r1)
/* Store general purpose registers. */ /* Store general purpose registers. */
stmg %r0,%r15,SC_GPRS(%r5) stmg %r0,%r15,SC_GPRS(%r1)
/* Return. */ /* Return. */
br %r14 br %r14

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@ -31,38 +31,39 @@
other than the PRESERVED state. */ other than the PRESERVED state. */
ENTRY(__setcontext) ENTRY(__setcontext)
lgr %r5,%r2 lgr %r1,%r2
/* sigprocmask (SIG_SETMASK, &sc->sc_mask, NULL). */ /* sigprocmask (SIG_SETMASK, &sc->sc_mask, NULL). */
la %r2,SIG_BLOCK la %r2,SIG_BLOCK
la %r3,SC_MASK(%r5) la %r3,SC_MASK(%r1)
slgr %r4,%r4 slgr %r4,%r4
lghi %r5,_NSIG8
svc SYS_ify(rt_sigprocmask) svc SYS_ify(rt_sigprocmask)
/* Load fpu context. */ /* Load fpu context. */
lfpc SC_FPC(%r5) lfpc SC_FPC(%r1)
ld %f0,SC_FPRS(%r5) ld %f0,SC_FPRS(%r1)
ld %f1,SC_FPRS+8(%r5) ld %f1,SC_FPRS+8(%r1)
ld %f2,SC_FPRS+16(%r5) ld %f2,SC_FPRS+16(%r1)
ld %f3,SC_FPRS+24(%r5) ld %f3,SC_FPRS+24(%r1)
ld %f4,SC_FPRS+32(%r5) ld %f4,SC_FPRS+32(%r1)
ld %f5,SC_FPRS+40(%r5) ld %f5,SC_FPRS+40(%r1)
ld %f6,SC_FPRS+48(%r5) ld %f6,SC_FPRS+48(%r1)
ld %f7,SC_FPRS+56(%r5) ld %f7,SC_FPRS+56(%r1)
ld %f8,SC_FPRS+64(%r5) ld %f8,SC_FPRS+64(%r1)
ld %f9,SC_FPRS+72(%r5) ld %f9,SC_FPRS+72(%r1)
ld %f10,SC_FPRS+80(%r5) ld %f10,SC_FPRS+80(%r1)
ld %f11,SC_FPRS+88(%r5) ld %f11,SC_FPRS+88(%r1)
ld %f12,SC_FPRS+96(%r5) ld %f12,SC_FPRS+96(%r1)
ld %f13,SC_FPRS+104(%r5) ld %f13,SC_FPRS+104(%r1)
ld %f14,SC_FPRS+112(%r5) ld %f14,SC_FPRS+112(%r1)
ld %f15,SC_FPRS+120(%r5) ld %f15,SC_FPRS+120(%r1)
/* Don't touch %a0 and %a1, used for thread purposes. */ /* Don't touch %a0 and %a1, used for thread purposes. */
lam %a2,%a15,SC_ACRS+8(%r5) lam %a2,%a15,SC_ACRS+8(%r1)
/* Load general purpose registers. */ /* Load general purpose registers. */
lmg %r0,%r15,SC_GPRS(%r5) lmg %r0,%r15,SC_GPRS(%r1)
/* Return. */ /* Return. */
br %r14 br %r14

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@ -34,12 +34,13 @@
ENTRY(__swapcontext) ENTRY(__swapcontext)
lgr %r1,%r2 lgr %r1,%r2
lgr %r5,%r3 lgr %r0,%r3
/* sigprocmask (SIG_BLOCK, NULL, &sc->sc_mask). */ /* sigprocmask (SIG_BLOCK, NULL, &sc->sc_mask). */
la %r2,SIG_BLOCK la %r2,SIG_BLOCK
slgr %r3,%r3 slgr %r3,%r3
la %r4,SC_MASK(%r1) la %r4,SC_MASK(%r1)
lghi %r5,_NSIG8
svc SYS_ify(rt_sigprocmask) svc SYS_ify(rt_sigprocmask)
/* Store fpu context. */ /* Store fpu context. */
@ -72,11 +73,14 @@ ENTRY(__swapcontext)
/* sigprocmask (SIG_SETMASK, &sc->sc_mask, NULL). */ /* sigprocmask (SIG_SETMASK, &sc->sc_mask, NULL). */
la %r2,SIG_BLOCK la %r2,SIG_BLOCK
lgr %r5,%r0
la %r3,SC_MASK(%r5) la %r3,SC_MASK(%r5)
lghi %r5,_NSIG8
slgr %r4,%r4 slgr %r4,%r4
svc SYS_ify(rt_sigprocmask) svc SYS_ify(rt_sigprocmask)
/* Load fpu context. */ /* Load fpu context. */
lgr %r5,%r0
lfpc SC_FPC(%r5) lfpc SC_FPC(%r5)
ld %f0,SC_FPRS(%r5) ld %f0,SC_FPRS(%r5)
ld %f1,SC_FPRS+8(%r5) ld %f1,SC_FPRS+8(%r5)

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@ -8,6 +8,8 @@ SIG_BLOCK
SIG_UNBLOCK SIG_UNBLOCK
SIG_SETMASK SIG_SETMASK
_NSIG8 (_NSIG / 8)
#define ucontext(member) offsetof (ucontext_t, member) #define ucontext(member) offsetof (ucontext_t, member)
#define mcontext(member) ucontext (uc_mcontext.member) #define mcontext(member) ucontext (uc_mcontext.member)