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Author SHA1 Message Date
H.J. Lu
1dfa4a94ae Update libmvec multiarch functions for <cpu-features.h> 
This patch updates libmvec multiarch functions to use the newly defined
HAS_CPU_FEATURE, HAS_ARCH_FEATURE and LOAD_RTLD_GLOBAL_RO_RDX from
<cpu-features.h>.

	* math/Makefile ($(addprefix $(objpfx), $(libm-vec-tests))):
	Remove $(objpfx)init-arch.o.
	* sysdeps/x86_64/fpu/Makefile (libmvec-support): Remove
	init-arch.
	* sysdeps/x86_64/fpu/math-tests-arch.h (avx_usable): Removed.
	(INIT_ARCH_EXT): Defined as empty.
	(CHECK_ARCH_EXT): Replace HAS_XXX with HAS_ARCH_FEATURE (XXX).
	* sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core.S: Remove
	__init_cpu_features call.  Replace HAS_XXX with
	HAS_CPU_FEATURE/HAS_ARCH_FEATURE (XXX).
	* sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core.S: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core.S: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core.S: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core.S: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_log2_core.S: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_log4_core.S: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_log8_core.S: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core.S: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core.S: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core.S: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core.S: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core.S: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core.S: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core.S: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core.S: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core.S: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core.S: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core.S: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_s_cosf8_core.S: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core.S: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_s_expf4_core.S: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_s_expf8_core.S: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core.S: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_s_logf4_core.S: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_s_logf8_core.S: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core.S: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core.S: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core.S: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core.S: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core.S: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core.S: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core.S: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_s_sinf4_core.S: Likewise.
	* sysdeps/x86_64/fpu/multiarch/svml_s_sinf8_core.S: Likewise.
 2015-08-13 03:41:47 -07:00
Andrew Senkevich
a9e8ea51cc Prevent runtime fail of SSE vector math tests on non SSE4.1 machine. 
[BZ #18740]
    * sysdeps/x86_64/fpu/Makefile (double-vlen2-arch-ext-cflags,
    float-vlen4-arch-ext-cflags): Removed.
    * math/Makefile (CFLAGS-test-double-vlen2-wrappers.c,
    CFLAGS-test-float-vlen4-wrappers.c): Likewise.
 2015-07-30 18:00:24 +03:00
Andrew Senkevich
36870482d2 Combination of data tables for x86_64 vector functions sinf, cosf and sincosf. 
* sysdeps/x86_64/fpu/Makefile (libmvec-support): Fixed files list.
    * sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core_sse4.S: Renamed variable
    and included header.
    * sysdeps/x86_64/fpu/multiarch/svml_s_cosf8_core_avx2.S: Likewise.
    * sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core_avx512.S: Likewise.
    * sysdeps/x86_64/fpu/multiarch/svml_s_sinf4_core_sse4.S: Likewise.
    * sysdeps/x86_64/fpu/multiarch/svml_s_sinf8_core_avx2.S: Likewise.
    * sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core_avx512.S: Likewise.
    * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core_sse4.S: Likewise.
    * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core_avx2.S: Likewise.
    * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core_avx512.S: Likewise.
    * sysdeps/x86_64/fpu/svml_s_trig_data.S: New file.
    * sysdeps/x86_64/fpu/svml_s_trig_data.h: Likewise.
    * sysdeps/x86_64/fpu/svml_s_cosf_data.S: Removed file.
    * sysdeps/x86_64/fpu/svml_s_cosf_data.h: Likewise.
    * sysdeps/x86_64/fpu/svml_s_sinf_data.S: Likewise.
    * sysdeps/x86_64/fpu/svml_s_sinf_data.h: Likewise.
    * sysdeps/x86_64/fpu/svml_s_sincosf_data.S: Likewise.
    * sysdeps/x86_64/fpu/svml_s_sincosf_data.h: Likewise.
 2015-06-24 17:44:35 +03:00
Andrew Senkevich
5872b8352a Combination of data tables for x86_64 vector functions sin, cos and sincos. 
* sysdeps/x86_64/fpu/Makefile (libmvec-support): Fixed files list.
    * sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core_sse4.S: Renamed variable
    and included header.
    * sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core_avx2.S: Likewise.
    * sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core_avx512.S: Likewise.
    * sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core_sse4.S: Likewise.
    * sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core_avx2.S: Likewise.
    * sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core_avx512.S: Likewise.
    * sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core_sse4.S: Likewise.
    * sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core_avx2.S: Likewise.
    * sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core_avx512.S: Likewise.
    * sysdeps/x86_64/fpu/svml_d_trig_data.S: New file.
    * sysdeps/x86_64/fpu/svml_d_trig_data.h: Likewise.
    * sysdeps/x86_64/fpu/svml_d_cos2_core.S: Removed unneeded include.
    * sysdeps/x86_64/fpu/svml_d_cos4_core.S: Likewise.
    * sysdeps/x86_64/fpu/svml_d_cos8_core.S: Likewise.
    * sysdeps/x86_64/fpu/svml_d_cos_data.S: Removed file.
    * sysdeps/x86_64/fpu/svml_d_cos_data.h: Likewise.
    * sysdeps/x86_64/fpu/svml_d_sin_data.S: Likewise.
    * sysdeps/x86_64/fpu/svml_d_sin_data.h: Likewise.
    * sysdeps/x86_64/fpu/svml_d_sincos_data.S: Likewise.
    * sysdeps/x86_64/fpu/svml_d_sincos_data.h: Likewise.
 2015-06-23 19:21:50 +03:00
Andrew Senkevich
a6336cc446 Vector sincosf for x86_64 and tests. 
Here is implementation of vectorized sincosf containing SSE, AVX,
AVX2 and AVX512 versions according to Vector ABI
<https://groups.google.com/forum/#!topic/x86-64-abi/LmppCfN1rZ4>.

    * NEWS: Mention addition of x86_64 vector sincosf.
    * math/test-float-vlen16.h: Added wrapper for sincosf tests.
    * math/test-float-vlen4.h: Likewise.
    * math/test-float-vlen8.h: Likewise.
    * sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New symbols added.
    * sysdeps/x86/fpu/bits/math-vector.h: Added sincosf SIMD declaration.
    * sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files.
    * sysdeps/x86_64/fpu/Versions: New versions added.
    * sysdeps/x86_64/fpu/libm-test-ulps: Regenerated.
    * sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines):
    Added build of SSE, AVX2 and AVX512 IFUNC versions.
    * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core.S
    * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core_avx512.S
    * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core.S
    * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core_sse4.S
    * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core.S
    * sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core_avx2.S
    * sysdeps/x86_64/fpu/svml_s_sincosf16_core.S
    * sysdeps/x86_64/fpu/svml_s_sincosf4_core.S
    * sysdeps/x86_64/fpu/svml_s_sincosf8_core.S
    * sysdeps/x86_64/fpu/svml_s_sincosf8_core_avx.S
    * sysdeps/x86_64/fpu/svml_s_sincosf_data.S: New file.
    * sysdeps/x86_64/fpu/svml_s_sincosf_data.h: New file.
    * sysdeps/x86_64/fpu/svml_s_wrapper_impl.h: Added 3 argument wrappers.
    * sysdeps/x86_64/fpu/test-float-vlen16.c: : Vector sincosf tests.
    * sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen4-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen4.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8-avx2-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8-avx2.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8.c: Likewise.
 2015-06-18 20:11:27 +03:00
Andrew Senkevich
c9a8c526ac Vector sincos for x86_64 and tests. 
Here is implementation of vectorized sincos containing SSE, AVX,
AVX2 and AVX512 versions according to Vector ABI
<https://groups.google.com/forum/#!topic/x86-64-abi/LmppCfN1rZ4>.

    * NEWS: Mention addition of x86_64 vector sincos.
    * bits/libm-simd-decl-stubs.h: Added stubs for sincos.
    * math/math.h (__MATHDECL_VEC): New macro.
    * math/bits/mathcalls.h: Added sincos declaration with __MATHDECL_VEC.
    * math/gen-libm-have-vector-test.sh: Added generation of sincos wrapper
    declaration under condition.
    * math/test-vec-loop.h (TEST_VEC_LOOP): Refactored.
    * math/test-double-vlen2.h: Added wrapper for sincos tests, reflected
    TEST_VEC_LOOP change.
    * math/test-double-vlen4.h: Likewise.
    * math/test-double-vlen8.h: Likewise.
    * math/test-float-vlen16.h: Reflected TEST_VEC_LOOP change.
    * math/test-float-vlen4.h: Likewise.
    * math/test-float-vlen8.h: Likewise.
    * sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New symbols added.
    * sysdeps/x86/fpu/bits/math-vector.h: Added sincos SIMD declaration.
    * sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files.
    * sysdeps/x86_64/fpu/Versions: New versions added.
    * sysdeps/x86_64/fpu/libm-test-ulps: Regenerated.
    * sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines):
    Added build of SSE, AVX2 and AVX512 IFUNC versions.
    * sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core_sse4.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core_avx2.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core_avx512.S: New file.
    * sysdeps/x86_64/fpu/svml_d_sincos2_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_sincos4_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_sincos4_core_avx.S: New file.
    * sysdeps/x86_64/fpu/svml_d_sincos8_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_sincos_data.S: New file.
    * sysdeps/x86_64/fpu/svml_d_sincos_data.h: New file.
    * sysdeps/x86_64/fpu/svml_d_wrapper_impl.h: Added wrappers for sincos.
    * sysdeps/x86_64/fpu/test-double-vlen2-wrappers.c: Vector sincos tests.
    * sysdeps/x86_64/fpu/test-double-vlen2.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-avx2-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-avx2.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen8-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen8.c: Likewise.
 2015-06-18 17:55:55 +03:00
Andrew Senkevich
8aa92022e2 Vector powf for x86_64 and tests. 
Here is implementation of vectorized powf containing SSE, AVX,
AVX2 and AVX512 versions according to Vector ABI
<https://groups.google.com/forum/#!topic/x86-64-abi/LmppCfN1rZ4>.

    * sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New symbols added.
    * sysdeps/x86/fpu/bits/math-vector.h: Added SIMD declaration and asm
    redirections for powf.
    * sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files.
    * sysdeps/x86_64/fpu/Versions: New versions added.
    * sysdeps/x86_64/fpu/libm-test-ulps: Regenerated.
    * sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines):
    Added build of SSE, AVX2 and AVX512 IFUNC versions.
    * sysdeps/x86_64/fpu/svml_s_wrapper_impl.h: Added 2 argument wrappers.
    * sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core_avx512.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core_sse4.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core_avx2.S: New file.
    * sysdeps/x86_64/fpu/svml_s_powf16_core.S: New file.
    * sysdeps/x86_64/fpu/svml_s_powf4_core.S: New file.
    * sysdeps/x86_64/fpu/svml_s_powf8_core.S: New file.
    * sysdeps/x86_64/fpu/svml_s_powf8_core_avx.S: New file.
    * sysdeps/x86_64/fpu/svml_s_powf_data.S: New file.
    * sysdeps/x86_64/fpu/svml_s_powf_data.h: New file.
    * sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c: Vector powf tests.
    * sysdeps/x86_64/fpu/test-float-vlen16.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen4-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen4.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8-avx2-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8-avx2.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8.c: Likewise.
    * math/test-float-vlen16.h: Fixed 2 argument macro.
    * math/test-float-vlen4.h: Likewise.
    * math/test-float-vlen8.h: Likewise.
    * NEWS: Mention addition of x86_64 vector powf.
 2015-06-18 17:04:07 +03:00
Andrew Senkevich
c10b9b13f7 Vector pow for x86_64 and tests. 
Here is implementation of vectorized pow containing SSE, AVX,
AVX2 and AVX512 versions according to Vector ABI
<https://groups.google.com/forum/#!topic/x86-64-abi/LmppCfN1rZ4>.

  * bits/libm-simd-decl-stubs.h: Added stubs for pow.
    * math/bits/mathcalls.h: Added pow declaration with __MATHCALL_VEC.
    * sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New versions added.
    * sysdeps/x86/fpu/bits/math-vector.h: Added SIMD declaration and asm
    redirections for pow.
    * sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files.
    * sysdeps/x86_64/fpu/Versions: New versions added.
    * sysdeps/x86_64/fpu/libm-test-ulps: Regenerated.
    * sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines): Added
    build of SSE, AVX2 and AVX512 IFUNC versions.
    * sysdeps/x86_64/fpu/svml_d_wrapper_impl.h: Added 2 argument wrappers.
    * sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core_sse4.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core_avx2.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core_avx512.S: New file.
    * sysdeps/x86_64/fpu/svml_d_pow2_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_pow4_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_pow4_core_avx.S: New file.
    * sysdeps/x86_64/fpu/svml_d_pow8_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_pow_data.S: New file.
    * sysdeps/x86_64/fpu/svml_d_pow_data.h: New file.
    * sysdeps/x86_64/fpu/test-double-vlen2-wrappers.c: Added vector pow test.
    * sysdeps/x86_64/fpu/test-double-vlen2.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-avx2-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-avx2.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen8-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen8.c: Likewise.
    * NEWS: Mention addition of x86_64 vector pow.
 2015-06-17 16:22:26 +03:00
Andrew Senkevich
1663be053d Vector expf for x86_64 and tests. 
Here is implementation of vectorized expf containing SSE, AVX,
AVX2 and AVX512 versions according to Vector ABI
<https://groups.google.com/forum/#!topic/x86-64-abi/LmppCfN1rZ4>.

    * sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New symbols added.
    * sysdeps/x86/fpu/bits/math-vector.h: Added SIMD declaration and asm
    redirections for expf.
    * sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files.
    * sysdeps/x86_64/fpu/Versions: New versions added.
    * sysdeps/x86_64/fpu/libm-test-ulps: Regenerated.
    * sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines): Added
    build of SSE, AVX2 and AVX512 IFUNC versions.
    * sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core_avx512.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_expf4_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_expf4_core_sse4.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_expf8_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_expf8_core_avx2.S: New file.
    * sysdeps/x86_64/fpu/svml_s_expf16_core.S: New file.
    * sysdeps/x86_64/fpu/svml_s_expf4_core.S: New file.
    * sysdeps/x86_64/fpu/svml_s_expf8_core.S: New file.
    * sysdeps/x86_64/fpu/svml_s_expf8_core_avx.S: New file.
    * sysdeps/x86_64/fpu/svml_s_expf_data.S: New file.
    * sysdeps/x86_64/fpu/svml_s_expf_data.h: New file.
    * sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c: Vector expf tests.
    * sysdeps/x86_64/fpu/test-float-vlen16.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen4-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen4.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8-avx2-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8-avx2.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8.c: Likewise.
    * NEWS: Mention addition of x86_64 vector expf.
 2015-06-17 16:10:51 +03:00
Andrew Senkevich
9c02f663f6 Vector exp for x86_64 and tests. 
Here is implementation of vectorized exp containing SSE, AVX,
AVX2 and AVX512 versions according to Vector ABI
<https://groups.google.com/forum/#!topic/x86-64-abi/LmppCfN1rZ4>.

    * bits/libm-simd-decl-stubs.h: Added stubs for exp.
    * math/bits/mathcalls.h: Added exp declaration with __MATHCALL_VEC.
    * sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New versions added.
    * sysdeps/x86/fpu/bits/math-vector.h: Added SIMD declaration and asm
    redirections for exp.
    * sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files.
    * sysdeps/x86_64/fpu/Versions: New versions added.
    * sysdeps/x86_64/fpu/libm-test-ulps: Regenerated.
    * sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines): Added
    build of SSE, AVX2 and AVX512 IFUNC versions.
    * sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core_sse4.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core_avx2.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core_avx512.S: New file.
    * sysdeps/x86_64/fpu/svml_d_exp2_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_exp4_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_exp4_core_avx.S: New file.
    * sysdeps/x86_64/fpu/svml_d_exp8_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_exp_data.S: New file.
    * sysdeps/x86_64/fpu/svml_d_exp_data.h: New file.
    * sysdeps/x86_64/fpu/test-double-vlen2-wrappers.c: Added vector exp test.
    * sysdeps/x86_64/fpu/test-double-vlen2.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-avx2-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-avx2.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen8-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen8.c: Likewise.
    * NEWS: Mention addition of x86_64 vector exp.
 2015-06-17 15:58:05 +03:00
Andrew Senkevich
774488f88a Vector logf for x86_64 and tests. 
Here is implementation of vectorized logf containing SSE, AVX,
AVX2 and AVX512 versions according to Vector ABI
<https://groups.google.com/forum/#!topic/x86-64-abi/LmppCfN1rZ4>.

    * sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New symbols added.
    * sysdeps/x86/fpu/bits/math-vector.h: Added SIMD declaration and asm
    redirections for logf.
    * sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files.
    * sysdeps/x86_64/fpu/Versions: New versions added.
    * sysdeps/x86_64/fpu/libm-test-ulps: Regenerated.
    * sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines): Added
    build of SSE, AVX2 and AVX512 IFUNC versions.
    * sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core_avx512.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_logf4_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_logf4_core_sse4.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_logf8_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_logf8_core_avx2.S: New file.
    * sysdeps/x86_64/fpu/svml_s_logf16_core.S: New file.
    * sysdeps/x86_64/fpu/svml_s_logf4_core.S: New file.
    * sysdeps/x86_64/fpu/svml_s_logf8_core.S: New file.
    * sysdeps/x86_64/fpu/svml_s_logf8_core_avx.S: New file.
    * sysdeps/x86_64/fpu/svml_s_logf_data.S: New file.
    * sysdeps/x86_64/fpu/svml_s_logf_data.h: New file.
    * sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c: Vector logf tests.
    * sysdeps/x86_64/fpu/test-float-vlen16.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen4-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen4.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8-avx2-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8-avx2.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8.c: Likewise.
    * NEWS: Mention addition of x86_64 vector logf.
 2015-06-17 15:53:00 +03:00
Andrew Senkevich
6af25acc7b Vector log for x86_64 and tests. 
Here is implementation of vectorized log containing SSE, AVX,
AVX2 and AVX512 versions according to Vector ABI
<https://groups.google.com/forum/#!topic/x86-64-abi/LmppCfN1rZ4>.

    * bits/libm-simd-decl-stubs.h: Added stubs for log.
    * math/bits/mathcalls.h: Added log declaration with __MATHCALL_VEC.
    * sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New versions added.
    * sysdeps/x86/fpu/bits/math-vector.h: Added SIMD declaration and asm
    redirections for log.
    * sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files.
    * sysdeps/x86_64/fpu/Versions: New versions added.
    * sysdeps/x86_64/fpu/libm-test-ulps: Regenerated.
    * sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines): Added
    build of SSE, AVX2 and AVX512 IFUNC versions.
    * sysdeps/x86_64/fpu/multiarch/svml_d_log2_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_log2_core_sse4.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_log4_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_log4_core_avx2.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_log8_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_log8_core_avx512.S: New file.
    * sysdeps/x86_64/fpu/svml_d_log2_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_log4_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_log4_core_avx.S: New file.
    * sysdeps/x86_64/fpu/svml_d_log8_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_log_data.S: New file.
    * sysdeps/x86_64/fpu/svml_d_log_data.h: New file.
    * sysdeps/x86_64/fpu/test-double-vlen2-wrappers.c: Added vector log test.
    * sysdeps/x86_64/fpu/test-double-vlen2.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-avx2-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-avx2.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen8-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen8.c: Likewise.
    * NEWS: Mention addition of x86_64 vector log.
 2015-06-17 15:38:29 +03:00
Andrew Senkevich
2a8c2c7b33 Vector sinf for x86_64 and tests. 
Here is implementation of vectorized sinf containing SSE, AVX,
AVX2 and AVX512 versions according to Vector ABI
<https://groups.google.com/forum/#!topic/x86-64-abi/LmppCfN1rZ4>.

    * sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New symbols added.
    * sysdeps/x86/fpu/bits/math-vector.h: Added SIMD declaration for sinf.
    * sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files.
    * sysdeps/x86_64/fpu/Versions: New versions added.
    * sysdeps/x86_64/fpu/libm-test-ulps: Regenerated.
    * sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines): Added
    build of SSE, AVX2 and AVX512 IFUNC versions.
    * sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core_avx512.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_sinf4_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_sinf4_core_sse4.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_sinf8_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_sinf8_core_avx2.S: New file.
    * sysdeps/x86_64/fpu/svml_s_sinf16_core.S: New file.
    * sysdeps/x86_64/fpu/svml_s_sinf4_core.S: New file.
    * sysdeps/x86_64/fpu/svml_s_sinf8_core.S: New file.
    * sysdeps/x86_64/fpu/svml_s_sinf8_core_avx.S: New file.
    * sysdeps/x86_64/fpu/svml_s_sinf_data.S: New file.
    * sysdeps/x86_64/fpu/svml_s_sinf_data.h: New file.
    * sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c: Vector sinf tests.
    * sysdeps/x86_64/fpu/test-float-vlen16.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen4-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen4.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8-avx2-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8-avx2.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-float-vlen8.c: Likewise.
    * NEWS: Mention addition of x86_64 vector sinf.
 2015-06-15 15:06:53 +03:00
Andrew Senkevich
4b9c2b707b Vector sin for x86_64 and tests. 
Here is implementation of vectorized sin containing SSE, AVX,
AVX2 and AVX512 versions according to Vector ABI
<https://groups.google.com/forum/#!topic/x86-64-abi/LmppCfN1rZ4>.

    * bits/libm-simd-decl-stubs.h: Added stubs for sin.
    * math/bits/mathcalls.h: Added sin declaration with __MATHCALL_VEC.
    * sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New versions added.
    * sysdeps/x86/fpu/bits/math-vector.h: SIMD declaration for sin.
    * sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files.
    * sysdeps/x86_64/fpu/Versions: New versions added.
    * sysdeps/x86_64/fpu/libm-test-ulps: Regenerated.
    * sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines): Added
    build of SSE, AVX2 and AVX512 IFUNC versions.
    * sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core_sse4.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core_avx2.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core_avx512.S: New file.
    * sysdeps/x86_64/fpu/svml_d_sin2_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_sin4_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_sin4_core_avx.S: New file.
    * sysdeps/x86_64/fpu/svml_d_sin8_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_sin_data.S: New file.
    * sysdeps/x86_64/fpu/svml_d_sin_data.h: New file.
    * sysdeps/x86_64/fpu/test-double-vlen2-wrappers.c: Added vector sin test.
    * sysdeps/x86_64/fpu/test-double-vlen2.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-avx2-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-avx2.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen4.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen8-wrappers.c: Likewise.
    * sysdeps/x86_64/fpu/test-double-vlen8.c: Likewise.
    * NEWS: Mention addition of x86_64 vector sin.
 2015-06-11 17:12:38 +03:00
Andrew Senkevich
2a523216d5 This patch adds vector cosf tests. 
* math/Makefile: Added CFLAGS for new tests.
    * math/test-float-vlen16.h: New file.
    * math/test-float-vlen4.h: New file.
    * math/test-float-vlen8.h: New file.
    * math/test-double-vlen2.h: Fixed 2 argument macro and comment.
    * sysdeps/x86_64/fpu/Makefile: Added new tests and variables.
    * sysdeps/x86_64/fpu/libm-test-ulps: Regenerated.
    * sysdeps/x86_64/fpu/test-float-vlen16-wrappers.c: New file.
    * sysdeps/x86_64/fpu/test-float-vlen16.c: New file.
    * sysdeps/x86_64/fpu/test-float-vlen4-wrappers.c: New file.
    * sysdeps/x86_64/fpu/test-float-vlen4.c: New file.
    * sysdeps/x86_64/fpu/test-float-vlen8-avx2-wrappers.c: New file.
    * sysdeps/x86_64/fpu/test-float-vlen8-avx2.c: New file.
    * sysdeps/x86_64/fpu/test-float-vlen8-wrappers.c: New file.
    * sysdeps/x86_64/fpu/test-float-vlen8.c: New file.
 2015-06-09 18:32:42 +03:00
Andrew Senkevich
04f496d602 Vector cosf for x86_64. 
Here is implementation of vectorized cosf containing SSE, AVX,
AVX2 and AVX512 versions according to Vector ABI
<https://groups.google.com/forum/#!topic/x86-64-abi/LmppCfN1rZ4>.

    * sysdeps/x86_64/fpu/Makefile (libmvec-support): Added new files.
    * sysdeps/x86_64/fpu/Versions: New versions added.
    * sysdeps/x86_64/fpu/svml_s_cosf4_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core_sse4.S: New file.
    * sysdeps/x86_64/fpu/svml_s_cosf8_core_avx.S: New file.
    * sysdeps/x86_64/fpu/svml_s_cosf8_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_cosf8_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_cosf8_core_avx2.S: New file.
    * sysdeps/x86_64/fpu/svml_s_cosf16_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core_avx512.S: New file.
    * sysdeps/x86_64/fpu/svml_s_wrapper_impl.h: New file.
    * sysdeps/x86_64/fpu/svml_s_cosf_data.S: New file.
    * sysdeps/x86_64/fpu/svml_s_cosf_data.h: New file.
    * sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines): Added
    build of SSE, AVX2 and AVX512 IFUNC versions.
    * sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New versions added.
    * sysdeps/x86/fpu/bits/math-vector.h: Added SIMD declaration for cosf.
    * NEWS: Mention addition of x86_64 vector cosf.
 2015-06-09 18:29:47 +03:00
Andrew Senkevich
24a2718f59 Addition of testing infrastructure for vector math functions. 
We test vector math functions using scalar tests infrastructure with
help of special wrappers from scalar versions to vector ones. Wrapper
implemented using platform specific vector types and placed in separate
file for compilation with architecture specific options, main part of
test has no such options. With help of system of definitions unfolding
of which is drived from test code we have wrapper called in individual
testing function instead of scalar function. Also system of definitions
includes generated during make check header math/libm-have-vector-test.h
with series of conditional definitions which help to avoid build fails
for functions having no vector versions; runtime architecture check
to prevent runtime fails of test run on inappropriate hardware.

    * math/Makefile: Added rules for vector tests.
    * math/gen-libm-have-vector-test.sh: Added generation of wrapper
    declaration under condition.
    * math/test-double-vlen2.h: New file.
    * math/test-double-vlen4.h: New file.
    * math/test-double-vlen8.h: New file.
    * math/test-vec-loop.h: Added initialization macro.
    * sysdeps/x86_64/fpu/Makefile: Added variables for vector tests.
    * sysdeps/x86_64/fpu/libm-test-ulps: Regenarated.
    * sysdeps/x86_64/fpu/math-tests-arch.h: New file.
    * sysdeps/x86_64/fpu/test-double-vlen2-wrappers.c: New file.
    * sysdeps/x86_64/fpu/test-double-vlen2.c: New file.
    * sysdeps/x86_64/fpu/test-double-vlen4-avx2-wrappers.c: New file.
    * sysdeps/x86_64/fpu/test-double-vlen4-avx2.c: New file.
    * sysdeps/x86_64/fpu/test-double-vlen4-wrappers.c: New file.
    * sysdeps/x86_64/fpu/test-double-vlen4.c: New file.
    * sysdeps/x86_64/fpu/test-double-vlen8-wrappers.c: New file.
    * sysdeps/x86_64/fpu/test-double-vlen8.c: New file.
 2015-06-09 14:51:52 +03:00
Andrew Senkevich
2193311288 Start of series of patches with x86_64 vector math functions. 
Here is implementation of cos containing SSE, AVX, AVX2 and AVX512
versions according to Vector ABI which had been discussed in
<https://groups.google.com/forum/#!topic/x86-64-abi/LmppCfN1rZ4>.

Vector math library build and ABI testing enabled by default for x86_64.

    * sysdeps/x86_64/fpu/Makefile: New file.
    * sysdeps/x86_64/fpu/Versions: New file.
    * sysdeps/x86_64/fpu/svml_d_cos_data.S: New file.
    * sysdeps/x86_64/fpu/svml_d_cos_data.h: New file.
    * sysdeps/x86_64/fpu/svml_d_cos2_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_cos4_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_cos4_core_avx.S: New file.
    * sysdeps/x86_64/fpu/svml_d_cos8_core.S: New file.
    * sysdeps/x86_64/fpu/svml_d_wrapper_impl.h: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core_sse4.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core_avx2.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core.S: New file.
    * sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core_avx512.S: New file.
    * sysdeps/x86_64/fpu/multiarch/Makefile (libmvec-sysdep_routines): Added
    build of SSE, AVX2 and AVX512 IFUNC versions.
    * sysdeps/x86/fpu/bits/math-vector.h: Added SIMD declaration for cos.
    * math/bits/mathcalls.h: Added cos declaration with __MATHCALL_VEC.
    * sysdeps/x86_64/configure.ac: Options for libmvec build.
    * sysdeps/x86_64/configure: Regenerated.
    * sysdeps/x86_64/sysdep.h (cfi_offset_rel_rsp): New macro.
    * sysdeps/unix/sysv/linux/x86_64/libmvec.abilist: New file.
    * manual/install.texi (Configuring and compiling): Document
    --disable-mathvec.
    * INSTALL: Regenerated.
    * NEWS: Mention addition of libmvec and x86_64 vector cos.
 2015-06-09 14:25:49 +03:00