Adhemerval Zanella 4393fc119c PowerPC: Optimized isinf/isinff for POWER8
This patch add a optimized isinf/isinff implementation for POWER8
using the new Move From VSR Doubleword instruction to gains some
cycles from FP to GRP register move.
2014-02-27 12:58:33 -06:00
..
2014-01-03 13:29:10 -06:00
2010-08-12 09:19:19 -07:00
2010-08-12 09:19:19 -07:00
2013-10-30 17:32:08 +10:00