506d7fb1d4
MIPS soft-float glibc does not support floating-point exceptions and rounding modes, and uses a different ABI from hard-float so a soft-float compilation cannot use a glibc that does support floating-point exceptions and rounding modes. Thus, bits/fenv.h should not, when compiling for soft-float, define macros for the unsupported features. This patch changes it accordingly to define those macros only for hard-float. None of the exception macros are defined for soft-float, with FE_ALL_EXCEPT defined to 0 in that case, and only FE_TONEAREST is defined of the rounding-mode macros, and FE_NOMASK_ENV is not defined; this is consistent with how architectures lacking exception and rounding mode support generally define things in this header. As well as making the header more correct for this case, this also means the generic math_private.h optimizations for this case automatically apply (inlining libm-internal fenv.h function calls that are trivial when exceptions and rounding modes are not supported). The mips64 sfp-machine.h then needs similar changes to disable more of the exception and rounding mode handling for soft-float. (The mips32 sfp-machine.h is already used only for soft-float, has no integration with hardware exceptions or rounding modes and so needs no changes.) Existing binaries might use the old FE_NOMASK_ENV value as an argument to fesetenv / feupdateenv and expect an error for it (given that it was defined in a header that also defined FE_ALL_EXCEPT to a nonzero value). To preserve that error, wrappers for the fallback fesetenv and feupdateenv are created in sysdeps/mips/nofpu/. Tested for mips64 (hard-float and soft-float, all three ABIs). [BZ #23479] * sysdeps/mips/bits/fenv.h (FE_INEXACT): Define only if [__mips_hard_float]. (FE_UNDERFLOW): Likewise. (FE_OVERFLOW): Likewise. (FE_DIVBYZERO): Likewise. (FE_INVALID): Likewise. (FE_ALL_EXCEPT): Define to 0 if [!__mips_hard_float]. (FE_TOWARDZERO): Define only if [__mips_hard_float]. (FE_UPWARD): Likewise. (FE_DOWNWARD): Likewise. (__FE_UNDEFINED): Define if [!__mips_hard_float] (FE_NOMASK_ENV): Define only if [__mips_hard_float]. * sysdeps/mips/mips64/sfp-machine.h (_FP_DECL_EX): Define only if [__mips_hard_float]. (FP_ROUNDMODE): Likewise. (FP_RND_NEAREST): Likewise. (FP_RND_ZERO): Likewise. (FP_RND_PINF): Likewise. (FP_RND_MINF): Likewise. (FP_EX_INVALID): Likewise. (FP_EX_OVERFLOW): Likewise. (FP_EX_UNDERFLOW): Likewise. (FP_EX_DIVZERO): Likewise. (FP_EX_INEXACT): Likewise. (FP_INIT_ROUNDMODE): Likewise. * sysdeps/mips/nofpu/fesetenv.c: New file. * sysdeps/mips/nofpu/feupdateenv.c: Likewise.
108 lines
3.0 KiB
C
108 lines
3.0 KiB
C
#include <fenv.h>
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#include <fpu_control.h>
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#define _FP_W_TYPE_SIZE 64
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#define _FP_W_TYPE unsigned long long
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#define _FP_WS_TYPE signed long long
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#define _FP_I_TYPE long long
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#define _FP_MUL_MEAT_S(R,X,Y) \
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_FP_MUL_MEAT_1_imm(_FP_WFRACBITS_S,R,X,Y)
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#define _FP_MUL_MEAT_D(R,X,Y) \
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_FP_MUL_MEAT_1_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
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#define _FP_MUL_MEAT_Q(R,X,Y) \
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_FP_MUL_MEAT_2_wide_3mul(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
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#define _FP_MUL_MEAT_DW_S(R,X,Y) \
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_FP_MUL_MEAT_DW_1_imm(_FP_WFRACBITS_S,R,X,Y)
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#define _FP_MUL_MEAT_DW_D(R,X,Y) \
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_FP_MUL_MEAT_DW_1_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
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#define _FP_MUL_MEAT_DW_Q(R,X,Y) \
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_FP_MUL_MEAT_DW_2_wide_3mul(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
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#define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_imm(S,R,X,Y,_FP_DIV_HELP_imm)
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#define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_1_udiv_norm(D,R,X,Y)
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#define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_2_udiv(Q,R,X,Y)
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#ifdef __mips_nan2008
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# define _FP_NANFRAC_S ((_FP_QNANBIT_S << 1) - 1)
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# define _FP_NANFRAC_D ((_FP_QNANBIT_D << 1) - 1)
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# define _FP_NANFRAC_Q ((_FP_QNANBIT_Q << 1) - 1), -1
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#else
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# define _FP_NANFRAC_S (_FP_QNANBIT_S - 1)
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# define _FP_NANFRAC_D (_FP_QNANBIT_D - 1)
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# define _FP_NANFRAC_Q (_FP_QNANBIT_Q - 1), -1
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#endif
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#define _FP_NANSIGN_S 0
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#define _FP_NANSIGN_D 0
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#define _FP_NANSIGN_Q 0
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#define _FP_KEEPNANFRACP 1
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#ifdef __mips_nan2008
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# define _FP_QNANNEGATEDP 0
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#else
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# define _FP_QNANNEGATEDP 1
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#endif
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#ifdef __mips_nan2008
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/* NaN payloads should be preserved for NAN2008. */
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# define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \
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do \
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{ \
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R##_s = X##_s; \
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_FP_FRAC_COPY_##wc (R, X); \
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R##_c = FP_CLS_NAN; \
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} \
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while (0)
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#else
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/* From my experiments it seems X is chosen unless one of the
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NaNs is sNaN, in which case the result is NANSIGN/NANFRAC. */
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# define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \
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do { \
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if ((_FP_FRAC_HIGH_RAW_##fs(X) | \
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_FP_FRAC_HIGH_RAW_##fs(Y)) & _FP_QNANBIT_##fs) \
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{ \
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R##_s = _FP_NANSIGN_##fs; \
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_FP_FRAC_SET_##wc(R,_FP_NANFRAC_##fs); \
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} \
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else \
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{ \
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R##_s = X##_s; \
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_FP_FRAC_COPY_##wc(R,X); \
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} \
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R##_c = FP_CLS_NAN; \
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} while (0)
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#endif
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#define _FP_TININESS_AFTER_ROUNDING 1
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#ifdef __mips_hard_float
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#define _FP_DECL_EX fpu_control_t _fcw
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#define FP_ROUNDMODE (_fcw & 0x3)
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#define FP_RND_NEAREST FE_TONEAREST
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#define FP_RND_ZERO FE_TOWARDZERO
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#define FP_RND_PINF FE_UPWARD
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#define FP_RND_MINF FE_DOWNWARD
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#define FP_EX_INVALID FE_INVALID
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#define FP_EX_OVERFLOW FE_OVERFLOW
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#define FP_EX_UNDERFLOW FE_UNDERFLOW
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#define FP_EX_DIVZERO FE_DIVBYZERO
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#define FP_EX_INEXACT FE_INEXACT
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#define FP_INIT_ROUNDMODE \
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do { \
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_FPU_GETCW (_fcw); \
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} while (0)
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#define FP_HANDLE_EXCEPTIONS \
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do { \
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if (__builtin_expect (_fex, 0)) \
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_FPU_SETCW (_fcw | _fex | (_fex << 10)); \
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} while (0)
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#define FP_TRAPPING_EXCEPTIONS ((_fcw >> 5) & 0x7c)
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#endif
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