487 Commits

Author SHA1 Message Date
Adhemerval Zanella
98fb27a373 PowerPC: remove wrong nearbyintl implementation for PPC64
The nearbyintl assembly implementation
(sysdeps/powerpc/powerpc64/fpu/s_nearbyintl.S)
returns wrong results for some inputs where first double is a exact
integer and the precision is determined by second long double.

Checking on implementation comments and history, I am very confident the
assembly implementation was based on a version before commit
5c68d401698a58cf7da150d9cce769fa6679ba5f that fixes BZ#2423 (Errors in
long double (ldbl-128ibm) rounding functions in glibc-2.4).

By just removing the implementation and make the build select
sysdeps/ieee754/ldbl-128ibm/s_nearbyintl.c instead fixes the failing
math.

Fixes BZ#16706.
2014-03-14 12:54:47 -05:00
Adhemerval Zanella
374f7f6121 PowerPC: remove wrong ceill implementation for PowerPC64
The ceill assembly implementation (sysdeps/powerpc/powerpc64/fpu/s_ceill.S)
returns wrong results for some inputs where first double is a exact
integer and the precision is determined by second long double.

Checking on implementation comments and history, I am very confident the
assembly implementation was based on a version before commit
5c68d401698a58cf7da150d9cce769fa6679ba5f that fixes BZ#2423 (Errors in
long double (ldbl-128ibm) rounding functions in glibc-2.4).

By just removing the implementation and make the build select
sysdeps/ieee754/ldbl-128ibm/s_ceill.c instead fixes the failing math.

Fixes BZ#16701.
2014-03-14 12:54:47 -05:00
Adhemerval Zanella
27c7220a48 PowerPC: Fix strspn for static build
This patch makes the strspn ifunc selector build for static builds.
2014-03-12 06:54:44 -05:00
Adhemerval Zanella
4facea4730 PowerPC: Fix bzero definition for static libc for PPC64
This patch fixes an issue for powerpc64[le] static build where __bzero
is definied in multiple places (memset-ppc64.o and bzero.o). It is now
defined only in bzero.o and memset-ppc64.o only defined __bzero_ppc for
both dynamic and static library.

Fixes BZ#16683.
2014-03-11 09:31:59 -05:00
Vidya Ranganathan
e65caf1f1d PowerPC: strspn optimization for PPC64/POWER7
The optimization is achieved by following techniques:
  > hashing of needle.
  > hashing avoids scanning of duplicate entries in needle across the string.
  > initializing the hash table with Vector instructions (VSX) by quadword access.
  > unrolling when scanning for character in string across hash table.
2014-03-11 08:54:33 -05:00
Adhemerval Zanella
ba9cc0714e PowerPC: strncat optimization for PPC64
The optimization is achieved by following techniques:
1. Doubleword aligned memory access and compares using
   cmpb instruction.
2. Loop unrolling for byte load/store.
3. CPU pre-fetch to avoid cache miss.
2014-03-10 07:25:09 -05:00
Rajalakshmi Srinivasaraghavan
c7debbdfac PowerPC: strrchr optimization for POWER7/PPC64
This patch optimizes strrchr() for ppc64. It uses aligned memory
access along with cmpb instruction and CPU prefetch to avoid
cache misses for speed improvement.
2014-03-03 08:06:41 -06:00
Adhemerval Zanella
fe13a20c37 PowerPC: llround/llroundf POWER8 optimization
This patch add a optimized llround/llroundf implementation for POWER8
using the new Move From VSR Doubleword instruction to gains some
cycles from FP to GRP register move.
2014-02-27 12:58:33 -06:00
Adhemerval Zanella
1ad8950a3e PowerPC: llrint/llrintf POWER8 optimization
This patch add a optimized llrint/llrintf implementation for POWER8
using the new Move From VSR Doubleword instruction to gains some
cycles from FP to GRP register move.
2014-02-27 12:58:33 -06:00
Adhemerval Zanella
cac626d60a PowerPC: Optimized finite/finitef for POWER8
This patch add a optimized finite/finitef implementation for POWER8
using the new Move From VSR Doubleword instruction to gains some
cycles from FP to GRP register move.
2014-02-27 12:58:33 -06:00
Adhemerval Zanella
4393fc119c PowerPC: Optimized isinf/isinff for POWER8
This patch add a optimized isinf/isinff implementation for POWER8
using the new Move From VSR Doubleword instruction to gains some
cycles from FP to GRP register move.
2014-02-27 12:58:33 -06:00
Adhemerval Zanella
487972aea5 PowerPC: Optimized isnan/isnanf for POWER8
This patch add a optimized isnan/isnanf implementation for POWER8
using the new Move From VSR Doubleword instruction to gains some
cycles from FP to GRP register move.
2014-02-27 12:58:32 -06:00
Ondřej Bílka
a1ffb40e32 Use glibc_likely instead __builtin_expect. 2014-02-10 15:07:12 +01:00
Adhemerval Zanella
38f3458175 PowerPC: remove wrong truncl implementation for PowerPC64
The truncl assembly implementation (sysdeps/powerpc/powerpc64/fpu/s_truncl.S)
returns wrong results for some inputs where first double is a exact integer
and the precision is determined by second long double.

Checking on implementation comments and history, I am very confident the
assembly implementation was based on a version before commit
5c68d401698a58cf7da150d9cce769fa6679ba5f that fixes BZ#2423 (Errors in
long double (ldbl-128ibm) rounding functions in glibc-2.4).

By just removing the implementation and make the build select
sysdeps/ieee754/ldbl-128ibm/s_truncl.c instead it fixes tgammal
issues regarding wrong result sign.
2014-01-08 08:14:48 -06:00
Adhemerval Zanella
d7ad2d9bad PowerPC: Fix compiler warnings
This patch fixes some compile warnings related to extra tokens at
end of #undef directive from multilib patchset.
2014-01-03 13:29:10 -06:00
Allan McRae
d4697bc93d Update copyright notices with scripts/update-copyrights 2014-01-01 22:00:23 +10:00
Andreas Schwab
83f5c32d21 Fix uses of CALL_MCOUNT in ppc64 assembler sources 2013-12-19 17:06:48 +01:00
Adhemerval Zanella
42fcb46ce6 PowerPC: multiarch hypot/hypotf for PowerPC64 2013-12-13 15:38:01 -05:00
Adhemerval Zanella
83efded424 PowerPC: multiarch modf/modff for PowerPC64 2013-12-13 15:37:23 -05:00
Adhemerval Zanella
43e246d2a6 PowerPC: multiarch logb/logbl/logbf for PowerPC64 2013-12-13 15:36:33 -05:00
Adhemerval Zanella
8fdad12379 PowerPC: multiarch isinf/isinff for PowerPC64 2013-12-13 15:35:44 -05:00
Adhemerval Zanella
1481d7066c PowerPC: multiarch finite/finitef for PowerPC64 2013-12-13 15:34:52 -05:00
Adhemerval Zanella
5ccd5fc893 PowerPC: multiarch llrint/lrint for PowerPC64 2013-12-13 15:33:54 -05:00
Adhemerval Zanella
2568f3fa69 PowerPC: multiarch copysign/copysignf for PowerPC64 2013-12-13 15:32:58 -05:00
Adhemerval Zanella
1cb341fd78 PowerPC: multiarch trunc/truncf for PowerPC64 2013-12-13 15:30:57 -05:00
Adhemerval Zanella
59a3e194f7 PowerPC: multiarch round/roundf for PowerPC64 2013-12-13 15:06:01 -05:00
Adhemerval Zanella
357fd3b40a PowerPC: multiarch floor/floorf for PowerPC64 2013-12-13 15:04:04 -05:00
Adhemerval Zanella
96770f12b0 PowerPC: multiarch ceil/ceilf for PowerPC64 2013-12-13 15:02:32 -05:00
Adhemerval Zanella
c3627f6e96 PowerPC: multiarch llround/lround for PowerPC64 2013-12-13 15:01:54 -05:00
Adhemerval Zanella
b2284ad7cf PowerPC: multiarch isnan/isnanf for PowerPC64 2013-12-13 15:01:10 -05:00
Adhemerval Zanella
69bbc63d88 PowerPC: Adjust multiarch Implies for PowerPC64
This patch adds Implies files on multiarch folder for POWER chips so
multirach is enabled when building with --with-cpu and powerN
option.
2013-12-13 14:58:02 -05:00
Adhemerval Zanella
c24517c9dd PowerPC: Cleaning up uneeded sqrt routines
For PPC64, all the wrappers at sysdeps are superfluous: they are
basically the same implementation from math/w_sqrt.c with the
'#ifdef _IEEE_LIBM'. And the power4 version just force the 'fsqrt'
instruction utilization with an inline assembly, which is already
handled by math_private.h __ieee754_sqrt implementation.
2013-12-13 14:56:09 -05:00
Adhemerval Zanella
a52374e82b PowerPC: multiarch stpcpy for PowerPC64 2013-12-13 14:55:22 -05:00
Adhemerval Zanella
7f5ec11336 PowerPC: multiarch strcpy for PowerPC64 2013-12-13 14:54:41 -05:00
Adhemerval Zanella
e28bcd427b PowerPC: multiarch wordcopy for PowerPC64 2013-12-13 14:54:08 -05:00
Adhemerval Zanella
92cacfce7d PowerPC: multiarch wcscpy for PowerPC64. 2013-12-13 14:53:25 -05:00
Adhemerval Zanella
7b714620a7 PowerPC: multiarch wcsrchr for PowerPC64 2013-12-13 14:52:48 -05:00
Adhemerval Zanella
16fd2ae37c PowerPC: multiarch wcschr for PowerPC64 2013-12-13 14:51:36 -05:00
Adhemerval Zanella
9ee2969b05 PowerPC: multiarch strchrnul for PowerPC64 2013-12-13 14:50:26 -05:00
Adhemerval Zanella
372dc060e0 PowerPC: multiarch strchr for PowerPC64 2013-12-13 14:49:54 -05:00
Adhemerval Zanella
24c2c3b996 PowerPC: multiarch strncmp for PowerPC64 2013-12-13 14:48:48 -05:00
Adhemerval Zanella
1c92d9a0e0 PowerPC: multiarch strncasecmp for PowerPC64 2013-12-13 14:40:28 -05:00
Adhemerval Zanella
17de3ee3c1 PowerPC: multiarch strcasecmp for PowerPC64 2013-12-13 14:39:51 -05:00
Adhemerval Zanella
62982bf978 PowerPC: multiarch strnlen for PowerPC64 2013-12-13 14:38:50 -05:00
Adhemerval Zanella
a65f4904ab PowerPC: multiarch strlen for PowerPC64 2013-12-13 14:38:17 -05:00
Adhemerval Zanella
1fd005ad2f PowerPC: multiarch rawmemchr for PowerPC64 2013-12-13 14:37:26 -05:00
Adhemerval Zanella
cd05ba9135 PowerPC: multiarch memrchr for PowerPC64 2013-12-13 14:36:50 -05:00
Adhemerval Zanella
870f867648 PowerPC: multiarch memchr for PowerPC64 2013-12-13 14:35:28 -05:00
Adhemerval Zanella
f00be62b08 PowerPC: multiarch mempcpy for PowerPC64 2013-12-13 14:34:06 -05:00
Adhemerval Zanella
8a29a3d00b PowerPC: multiarch memset/bzero for PowerPC64 2013-12-13 14:33:16 -05:00